Dr G S Javed
Design Thinker and Analog IC Design Manager
Dr G S Javed obtained his M.S. and Ph.D. from the Indian Institute of Science, Bangalore in 2016 for his work on low power integrated instrumentation circuits for sensing applications. From 2016 to 2020, he led and managed a 15 member transceiver design team in Terminus Circuits. He worked on high-speed wireline transceivers (upto 20 Gbps) focusing on the Receiver design, high speed RO and LC PLLs (upto 16 GHz), and CT Sigma Delta ADCs. From August 2008 to July 2010, he worked as Deputy Engineer with Integrated Circuit Design Center(ICDC), Bharat Electronics Limited (BEL).He enjoys photography, travel and meeting people.
He serves as a reviewer for many IEEE Transactions, Journals and Conferences. He is an invited speaker for specialized technical areas like Clocking Solutions, High Speed Links and Capacitance Sensor Interfaces and non-technical areas like Design Thinking and Problem Solving, Research Methodologies, Technical Writing and Entrepreneurship Skills.