"Hi! I am a Digital Design Engineer with a passion for turning complex architectural concepts into efficient, synthesizable silicon.

My career has been spent at the intersection of Processor Microarchitecture and AI Hardware Development. I’ve spent years mastering SystemVerilog, Verilog and VHDL to build high-performance accelerators and custom Instruction Set Architectures (ISA).

Why learn from me?

I don't just teach syntax. Having worked extensively with AI/ML workloads and hardware accelerators, I understand what the industry demands from a modern RTL Engineer. My goal is to bridge the gap between academic theory and professional-grade hardware design.

In my courses, we don't just 'simulate', we build. We focus on writing code that is synthesizable, efficient, and ready for FPGA or ASIC implementation. Whether you are looking to master RISC-V or break into AI hardware, I am here to provide the architectural insights and hands-on labs you need to succeed in the VLSI industry.