Uzaif is an FPGA Design Engineer. He did his bachelor's in Electronics Engineering and then pursued post-graduation in Electrical Engineering with a concentration in Digital and Computer Engineering. He did lots of academic projects including robotics and FPGAs. As an active member of the MARS (Methodologies and Architectures for Reconfigurable SoCs) group, he was involved in the Research & Development of accelerated real-time implementation of a colored object tracking system using High-Level Synthesis. He has experience in FPGA design and development with HDLs (Verilog/VHDL) and System-on-Chip.
Uzaif is a professional FPGA developer who has been working in the field for 4+ years. He has impressive skills in Digital Circuits, Simulations, Synthesis and P&R, Timing Analysis, CDCs, Design Optimization, Ethernet protocols, etc.
