Awais is a seasoned DFT and VLSI engineer with a strong academic background including a PhD in Electrical Engineering from National Central University, Taiwan. He specializes in designing and developing Design-for-Test (DFT) methodologies for automotive and non-automotive SoCs, leading projects on advanced test pattern development and silicon bring-up. His expertise include Synopsys flows development, ATPG enhancement, and memory BIST for leading manufacturing nodes. He also has experience in working on digital chip designs ranging from AI accelerators to Touch and Display Driver Integration (TDDI) to video and image compression. Furthermore, he has experience of designing software algorithms with focus on data compression algorithms, such as image, video, AI, memory, biomedical data.