VSD - TCL programming - From novice to expert - Part 1

Explore three user scenarios for a command-line tool: missing input, non-existent file, and how to display usage, with shell script argument checks and clear error messaging.

Demonstrates handling a user-provided csv file that may not exist and parsing -help arguments with shell-style conditions to show usage and error messages.

Identify variables and inputs, verify netlist and library files, convert constraints to a standard format, read all netlists, and frame a Tcl script to automate the format conversion process.

Learn to auto-create TCL variables from a matrix and arrays by parsing command arguments, indexing with dollar and bracket notation, and mapping values to design names in scripts.

Initialize a matrix from a file by defining the filename variable and opening the file. Install packages, access arguments, and derive the matrix size for auto-creation tasks.

Learn how the script auto-creates the first variable, designName, from a file’s first row by mapping and cleaning strings, then iterates through rows and columns to build subsequent variables.

Learn how to auto create and initialize variables in TCL, normalize input by removing spaces, map and validate values, and display results through stepwise checks.

Explore a variable creation demo in TCL, defining initial variables, displaying values on screen, and validating file existence within a script.

Verify file and directory existence in a TCL workflow using bracket tests that return boolean results. Learn to handle missing outputs and errors when design_details.csv references non-existent paths.

Convert constraints.csv to a matrix object by loading the constraints file into a matrix named constraints, then determine its rows and columns within a TCL programming workflow.

Learn to compute the row number of a data matrix in TCL by using matrix objects, constraints search, and clock, input, and output classifications to determine dimensions.

Explore computing row numbers and the maximum column count in TCL, printing the values as the clock starts and applying standard design constraints format.

Identify the column number for clock latency constraints by applying a constrained search within a matrix, defining a search rectangle, and iterating clock start values.

Explore how to start writing clock latency constraints in an SDC file using TCL, including opening a new file, setting variables, and printing status messages.

Master clock latency and clock slew constraints in SDC files through practical scripting and keyboard-driven lookups. Apply set clock and clock transition to derive delay values.

Code clock constraints by defining a clock name, its period, and its duty cycle, and relate them to frequency within a design constraint format for Tcl programming.

Explore a demo of creating complete clock constraints in Tcl, showing how the script iterates per clock, evaluates constraints, and prints latency values to verify correctness.

Learn to differentiate between bits and a bus, and how constraints apply uniformly to every bit. Use a top-level logfile to map bus points and differentiate bus and bit details.

Categorize input ports as bits or bus signals using a Verilog based algorithm that parses, splits semicolon delimited strings, and identifies start and end indices.

Learn to use globbing to identify files, build a list, and open each in a temporary area for line-by-line reading; parse data into a matrix using space and semicolon delimiters.

This lecture demonstrates regular expressions and regular substitution to produce fixed-space strings by collapsing multiple spaces to a single space while scanning lines across files.

Grep input ports from Verilog files and reformat the output to a fixed space, using regex patterns to extract and print matching netlist lines.

Learn to read, split, uniquify, sort, and join input ports to remove duplication in a script, with hands-on examples.

Learn tcl scripting fundamentals by evaluating string length, reading and splitting files, joining segments with slashes, and counting input elements to identify buses in a demo.

Demonstrates input constraint generation in TCL by converting Excel-sourced inputs into properly formatted constraints, and explains constraint syntax, semantics, and output design.

Explore constraints generation for output ports by adapting the input-port script to identify column indices and extract cell values, using regular expressions for accurate output data.