VSD - RISCV : Instruction Set Architecture (ISA) - Part 1a

Trace how apps and system software translate through compiler and assembler into a computer's instruction set architecture. Explore how binary instructions map to hardware from Harvard architecture to physical design.

Explore the RISC-V ISA basics, including the 64-bit base instruction set and extensions such as floating point. Learn how the application binary interface, memory, and stack shape program execution.

Explore 64-bit unsigned numbers, including decimal-to-binary conversion, memory layout, and how high and low 32-bit words form a 64-bit value, with overflow considerations.

Explore how 64-bit signed numbers are represented using a complement technique to encode positives and negatives. Note the sign by the most significant bit and the range described for rv64.

Understand how the application binary interface enables applications to access OS resources and processor functions through system calls and registers.

Explore how 64-bit RISC-V registers store and load data, focusing on memory layout and little-endian addressing, including byte ordering and memory addresses from M(0) onward.

Explore how load, add, and store instructions are represented in RISCV, including base addresses, offsets, registers like x23, and 32-bit instruction encoding.

Explain why RISCV uses 32 registers in a 64-bit ISA and how the ABI names map to the x0 to x31 registers, with r-type and i-type instruction classifications.

Explain how jump and link transfer control from the main program to a procedure, store the return address in a register, and describe 32-bit instruction encoding with I-type.

Explore unconditional jumps using jalr and how the stack pointer sp manages return addresses, saving and restoring registers with push and pop during procedure calls.

Explore how a c program calls leaf procedures, passing variables, and prints results, then map these calls to riscv isa with pseudo instructions and expansion into real instructions.

Explore RISCV instruction addresses mapping to memory; each 32-bit instruction occupies 4 bytes, and the next instruction sits four bytes later, while examining the program counter and stack pointer.

Explain how to store a register’s contents on the stack in RISCV ISA by adjusting the stack pointer with an offset of 40 and saving the value.

Explore how to load and pass arguments to printf in RISC-V by using the 'lui' instruction, wiring values into registers and constructing the call interface.

Explore jumping to a subroutine and returning to the main program using auipc and jalr, with emphasis on lower-bit addressing and return-address handling in program control.

Explore RISCV instruction set concepts by following the steps to load user input from the scanf procedure, detailing register usage, program flow, and scanner subroutine argument handling.

Learn how the RISCV load word instruction fetches stack arguments into registers, handles offsets, and uses jump and link to enter a leaf procedure, including leaf block evaluation.

explains how a leaf procedure executes by manipulating the stack and stack pointer, saving and restoring the return address and registers, performing arithmetic, and returning to the caller.

Explain saving and restoring the return address (ra) and stack pointer (sp) by storing register contents on the stack using specific offsets, supporting correct return to the main program.

Conclude the RISC-V ISA Part 1a by outlining the upcoming 64f and 64d floating-point extensions for Part B, and summarize how hardware description helps represent floating point numbers.