VSDOpen2019 - VLSI online conference
4.5 (14 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
58 students enrolled

VSDOpen2019 - VLSI online conference

Conducted LIVE online on 19th October, 2019
4.5 (14 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
58 students enrolled
Created by Kunal Ghosh
Last updated 10/2019
English
English [Auto]
Current price: $69.99 Original price: $99.99 Discount: 30% off
5 hours left at this price!
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This course includes
  • 5 hours on-demand video
  • 1 article
  • Full lifetime access
  • Access on mobile and TV
  • Certificate of Completion
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What you'll learn
  • Latest developments in the field of open-source VLSI, which is like the general knowledge interview questions
  • Researchers and Professors from around the world have presented their views on history and future of semi-conductors
  • Students and professionals will get an idea of where they currently stand and where can they help pitch in
  • Students will get an idea of how rewarding open-source technology is, in terms of jobs, research, and personal development
Requirements
  • Should be a part of VLSI industry or should have taken VLSI subjects
  • Should have completed atleast one of VLSI udemy courses
Description

Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference 2019. With enormous support and global presence of audience from different segments of industrial lobby and academia made VSDOpen 2018 a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon.

  • VSDOpen 2019, we are bringing you more interesting work done in RISC-V domain and Open Source EDA tools.

  • Industry and Academic research talks about the chip designed and developed using RISC-V ISA from IIT Madras India and SweRV from Western Digital.

  • First of its kind, Virtual Booth to Demonstrate the working RISC-V Chip and Board developed in complete Open source domain.

Who this course is for:
  • Anyone who is looking for skills needed to get a good job in VLSI
  • Anyone who wants to build a career in open-source VLSI
  • Anyone who is looking to start-up in VLSI and looking for ideas to do so, as open-source VLSI is rewarding, provided taken the right approach
  • Anyone looking for current status of RISC-V initiative and looking to start-up own processor company
Course content
Expand all 33 lectures 05:00:01
+ Open-source RTL2GDS initiative status
3 lectures 30:45
Keynote1 - Opensource EDA for RTL2GDS implementation - Part 1
10:29
Keynote1 - Opensource EDA for RTL2GDS implementation - Part 2
10:34
Keynote1 - Opensource EDA for RTL2GDS implementation - Part 3
09:42
+ First time open-source silicon success by Efabless
3 lectures 29:44
Demo1 - Raven Chip: First time silicon success with qflow efabless - Part 1
09:19
Demo1 - Raven Chip: First time silicon success with qflow efabless - Part 2
10:34
Demo1 - Raven Chip: First time silicon success with qflow efabless - Part 3
09:51
+ Unleashing open-source silicon
4 lectures 35:52
Invited talk - Unleashing open-source silicon - Part 1
09:49
Invited talk - Unleashing open-source silicon - Part 2
10:48
Invited talk - Unleashing open-source silicon - Part 3
08:43
Invited talk - Unleashing open-source silicon - Part 4
06:32
+ Overview of RISC-V open architecture
3 lectures 15:37
Keynote2 Growing momentum and opportunity of RISC-V open architecture - Part 1
05:03
Keynote2 Growing momentum and opportunity of RISC-V open architecture - Part 2
00:02
Keynote2 Growing momentum and opportunity of RISC-V open architecture - Part 3
10:32
+ The BOOM Machine
3 lectures 26:27
Invited presentation : BOOM - The Berkeley Out-Of-Order Machine - Part 1
11:05
Invited presentation : BOOM - The Berkeley Out-Of-Order Machine - Part 2
10:47
Invited presentation : BOOM - The Berkeley Out-Of-Order Machine - Part 3
04:35
+ CHIPS Alliance
3 lectures 27:29
Invited talk - Introduction to CHIPS Alliance - Part 1
09:40
Invited talk - Introduction to CHIPS Alliance - Part 2
09:50
Invited talk - Introduction to CHIPS Alliance - Part 3
07:59
+ Introduction Semiwiki 2.0
3 lectures 28:57
Keynote 3 - Fabless - The transformation of the semiconductor industry - Part 1
08:50
Keynote 3 - Fabless - The transformation of the semiconductor industry - Part 2
10:04
Keynote 3 - Fabless - The transformation of the semiconductor industry - Part 3
10:03
+ The PULP Project
2 lectures 16:58
Demo 2 - The PULP Project in 15 minutes - Part 1
10:47
Demo 2 - The PULP Project in 15 minutes - Part 2
06:11
+ Embedded UVM
2 lectures 19:58
Embedded UVM - Enabling multicore testbenches - Part 1
09:29
Embedded UVM - Enabling multicore testbenches - Part 2
10:29