VSDOpen2018 - First ever online VLSI conference
4.2 (41 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
3,040 students enrolled

VSDOpen2018 - First ever online VLSI conference

Conducted LIVE online on 27th October, 2018
4.2 (41 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
3,040 students enrolled
Created by Kunal Ghosh
Last updated 4/2019
English
Current price: $69.99 Original price: $99.99 Discount: 30% off
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This course includes
  • 5.5 hours on-demand video
  • Full lifetime access
  • Access on mobile and TV
  • Certificate of Completion
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What you'll learn
  • Semiconductor technology and design developed in Open source environment
  • Access to 6 symposia to cover all aspects of semiconductor technology with prime focus to build SoC using RISC-V CPU by illustrating exciting ways in the field of RTL design with Transaction-Level Verilog, Library characterization, Clock tree synthesis, Floorplanning, Placement & Routing, and Machine intelligence all using Opensource EDA tool
  • Experience first online conference in VLSI and semiconductor industry
Requirements
  • Current presence in VLSI industry is needed
  • Should be open to observe current trends happening in the field of RISC-V and open-source EDA
Description

VSDOpen2018, the six hours program, responds to many trends and challenges in semiconductor design using open source hardware tools and developing the IP to reach the silicon level, with papers and presentation in the research paper sessions covering the core set of design topics: Front-end open-source EDA tool flows for IC design and verification, Clock tree synthesis and optimization of digital IC’s for best Performance, Floorplanning of digital IC’s for best area, Place and Route of digital IC’s for best PPA, Standard cell layout/characterization for compact area/high performance/minimal routing resources, Machine Learning in EDA.

Key highlights of this conference were:

  1. Keynote by Prof. David Patterson on "A New Golden Age in Computer Architecture"

  2. Keynote by Prof. Sharon Hu on "Professional growth with ACM SIGDA"

  3. Keynote by Mohamed Kaseem on "Applying open community innovation to hardware product creation"

Apart from above keynotes, here are some interesting papers, on RISC-V and opensource EDA which were presented

  1. TAU 2019 contest announcement by George Chen from Intel

  2. Padframe generator for qflow (an opensource RTL2GDS tool) by Phillip Guhring, Vienna Austria

  3. PNR of digital core IC using cloud based EDA tool by Anand Rajgopalan, Mumbai University

  4. Coverage driven functional verification on RISC-V cores, by Lavanya J., Anmol Sahoo, Paul George from IIT Madras

  5. Rapid Physical IC implementation and integration using efabless platform by Alberto Gomez Saiz, Imperial college, London

  6. Introduction to TL-Verilog by Steve Hoover, Redwood EDA

  7. Formally verifying WARP-V, an open-source TL-Verilog RISC-V Core generator by Akos Hadnagy, TU Delft

  8. Top-down transaction level design with TL-Verilog by Ahmed Salman, Alexandria University

Who this course is for:
  • Beginner with knowledge on Application oriented SoC using RISC-V as CPU, cloud FPGA
  • Anyone with knowledge on Clock tree strategy for complex RISC-V CPU to achieve best performance in terms of skew and pulse width
  • Anyone with knowledge on Floorplanning for RISC-V CPU like picoRV32/E31_coreplex_IP to achieve best area
  • Anyone with knowledge on PNR strategy for complex blocks/full chip to achieve best PPA and runtime
  • Anyone with knowledge on Layout/Characterization of standard cells/IP’s using Magic/Guna
Course content
Expand all 35 lectures 05:28:44
+ Keynote 1 - By Prof. David Patterson
4 lectures 37:20
A new golden age for computer architecture - Part 1
09:51
A new golden age for computer architecture - Part 2
08:46
A new golden age for computer architecture - Part 3
09:03
QnA with Prof. David Patterson and introduction to Sharon Hu
09:40
+ Keynote 2 - By Prof. Sharon Hu
2 lectures 18:29
Professional growth with ACM SIGDA - Part 1
10:18
Professional growth with ACM SIGDA - Part 2
08:11
+ Invited presentation 1 - By George Chen, Intel
3 lectures 29:18
TAU2019 contest announcement - Part 1
10:50
TAU2019 contest announcement - Part 2
08:28
TAU2019 contest announcement - Part 3
10:00
+ Invited presentation 2 - By Phillip Guhring, Vienna Austria
3 lectures 27:18
Pad frame generator for qflow - Part 1
10:56
Pad frame generator for qflow - Part 2
09:27
QnA and networking break
06:55
+ Keynote 3 - By Mohamed Kaseem, CTO, efabless
4 lectures 42:42
Applying open community innovation to hardware product creation - Part 1
10:49
Applying open community innovation to hardware product creation - Part 2
09:37
Applying open community innovation to hardware product creation - Part 3
08:18
Applying open community innovation to hardware product creation - Part 4
13:58
+ Invited presentation 3 - By Anand Rajgopalan, Mumbai University
2 lectures 18:15
PNR of digita core lC using cloud based EDA tool - Part 1
10:59
PNR of digita core lC using cloud based EDA tool - Part 2
07:16
+ Invited presentation 4 - By Lavanya J, Anmol Sahoo, Paul George, IIT Madras
3 lectures 27:09
Coverage driven functional verification on RISC-V cores - Part 1
09:22
Coverage driven functional verification on RISC-V cores - Part 2
06:33
Coverage driven functional verification on RISC-V cores - Part 3
11:14
+ Invited presentation 5 - By Alberto Gomez Saiz, Imperial college, London
3 lectures 25:00
Rapid physical IC implementation & integration using efabless platform - Part 1
08:34
Rapid physical IC implementation & integration using efabless platform - Part 2
11:39
Rapid physical IC implementation & integration using efabless platform - Part 3
04:47
+ Invited presentation 6 - By Kunal Ghosh, Anagha Ghosh, VSD Corp. Pvt. Ltd.
3 lectures 32:11
Time to productize and monetize your open-source idea - Part 1
09:50
Time to productize and monetize your open-source idea - Part 2
10:55
Time to productize and monetize your open-source idea - Part 3
11:26