
Explain the need for library characterization and modelling within the IC design flow, from logic synthesis to floor planning and placement, emphasizing gates and memories as core building blocks.
Explore the GUNA characterization software for standard cell libraries, focusing on forward model features for power, noise, and variation, and learn to generate timing and other models from library data.
Characterize circuits using spice models and liberty configurations, following three steps—function acquisition, cognition, and stimulus generation—and spawn simulations on distributed computing with configurable workspace setups.
Learn to generate a GUNA workspace from a liberty file and spice netlist using the create workspace command, producing library and cell configurations with hierarchy details.
Explore how CDF and CDF vectors drive automatic stimulus generation, timing analysis, and extraction of electrical characteristics to produce Liberty files from netlists and pattern matching.
Discover GUNA syntax check commands and a CDF demo, using the software's built-in help to generate ZDF, inspect CDR artifacts, and learn about license access and cloud installation.
Join a live Q&A exploring library characterization and modeling concepts, including configuration file syntax checks and warnings. Explore course resources, links, and discourse discussions to apply the ideas with examples.
Examine timing analysis with the NLDM driver arcs and driver model, using a simplified relay-like model to estimate cell delay from input to output via slope, load, and effective capacitance.
Demonstrates generating a NLDM driver and receiver model from a Liberty library, and explains ensuring unit consistency for resistance, capacitance, and timing using Ohm's law and CV equations.
Explore NLDM tristate behavior, state-dependent delays, and sequential delays in library characterization and modeling, including threshold-based state transitions and practical lab demonstrations.
Explore tri-state circuits and state-dependent delays using SDF, analyze leakage power and enable timing, and examine NLDM issues in the CCS context.
Explore CCS and ECSM driver-receiver models, compare current sources with capacitance-based timing, and examine ECAC and SCS models through labs and software simulations.
Explore how CCS timing supports static timing analysis delay calculation, including library lookup, slope and load, interconnect effects, and the review of the flop timing model.
Examine the VLSI power components and power model usage, including switching power, short-circuit power, leakage power, and hidden power. Learn how these affect energy numbers, timing analysis, and power-driven optimization.
Explore the components of NLPM and labs on NLPM generation using GUNA, focusing on leakage, dynamic, and hidden power measurements and their manifestation at input and output pins.
Explore CCS power modeling, covering static power, leakage, and dynamic current with parasitics and a power-grid representation. Learn cross-load and diagonal options to manage model size and complexity.
Generate a CCSP model using GUNA and voltage drop analysis to capture current sources and CCS power networks, including active and inactive cells, leakage currents, and parasitics.
Explore NLDM, CCSN and ECSM noise model and crosstalk effects on timing, plus how s.c.s noise models partition nets and measure Miller capacitance.
Explore how local and global corners capture process, voltage, and temperature variation, including OCV modeling inaccuracies, and their impact on timing sign-off and circuit performance.
Explore advanced OCV (AOCV) and stage-based OCV (SBOCV) concepts and measurement. See how global variation creates corners, and learn how Monte Carlo sampling yields delay means and sigmas for modeling.
Discuss how timing analysis uses cell-type counts to determine depth in AOCV, and how the timing engine manages back-to-back cells and sigma-based accuracy versus simulation time.
Explain ocv challenges and accuracy issues at 14 and below, identify four unresolved factors, and introduce the liberty radiation format as a faster, scalable alternative to monte carlo in lvf.
Participants engage in a live Q&A on the AOCV and LVF comparison, exploring how area, depth, and distance shape library characterization and modelling.
Thank participants worldwide for attending the forum and acknowledge Floyd's dedication in bringing concepts forward, noting ongoing discussions and access to the recorded copy and free calls.
This webinar was conducted on 28th April, 2018
We are going to present "Characterization with GUNA : A characterization tool by Paripath". We will go through the characterization flows - flows which are popular for standard cells, memories, IP's. Within that, we will cover timing, noise, power and variation as 4 main topics of the characterization. Each one of those is expected to have a lab, where instructor will run GUNA as a standalone software and generate the models.
We will also clarify some concepts on chip variation, like what kind of variation exists (AOCV, POCV, SBOCV, LVF, etc), how do we tackle/model that, shortcoming of each on of this models and how do we move down the node, changing our model to account for some of the facts that show up in every transition to a new advanced node
So lot of exciting thing to be presented, and, the biggest thing about this webinar is the Instructor himself - Rohit Sharma.
About Instructor:
Rohit Sharma is Founder and CEO of Paripath Inc based in Milpitas, CA. He graduated from IIT Delhi. He has authored 2 books and published several papers in international conferences and journals. He has contributed to electronic design automation domain for over 20 years learning, improvising and designing solutions. He is passionate about many technical topics including Machine Learning, Analysis (above image), Characterization and Modeling, which led him to architect Guna - an advanced characterization software for modern nodes. He currently works for Paripath Inc.