Udemy
    •  
    •  
    •  
    •  
    •  
    •  
    •  
    •  
Turn what you know into an opportunity and reach millions around the world.
Learn More
Your cart is empty.
Keep shopping
VSD Intern - Analog Comparator Design using Sky130
Rating: 3.5 out of 5(13 ratings)
156 students

VSD Intern - Analog Comparator Design using Sky130

Comparator Circuit design and layout using Sky130 foundry PDKs
Created byKunal Ghosh, Malay Das
Last updated 4/2021
English
English [Auto],

What you'll learn

  • Basics of Analog comparator Circuit design and layout
  • Integrate Sky130 foundry PDKs with comparator circuit design
  • Basics of comparator hysteresis characteristics

Course content

4 sections • 15 lectures • 1h 3m total length

  • Introduction2:20

    Learn to set up Sky130 open source BDK, Energy Space simulator, Xschem schematic capture, and Magic layout tools for analog comparator design, and perform pre-layout and layout simulations.

Requirements

  • VSD - Circuit design and SPICE simulations
  • VSD - Custom layout
  • VSD Intern - Analog Bandgap Reference design using Sky130

Description

A comparator is a device that compares two analog inputs and outputs a digital signal indicating which input is larger. So it has two analog input terminals and one binary digital output. When the difference between two analog input signals approach zero, noise on the inputs will cause spurious switching of digital output. This rapid change in output due to noise can be prevented by hysteresis. Hysteresis is switching the output high or low at different input signal levels. In place of one switching point, hysteresis introduces two: one for rising edge, and one for falling edge of voltage or current. The difference between the higher-level trip value (VH) and the lower-level trip value (VL) equals the hysteresis voltage (HYST).

A comparator can be divided into three distinctive pieces – a front-end differential amplifier, amplifier stage and output stage.

This comparator consists of

  1. Front-end differential amplifier

  2. Amplifier of the output from front-end differential sage

  3. NAND gate to act as buffer as well as incorporate the enable pin

  4. Inverter to act as final buffer before output. The NAND and Inverter improves the slew and provides a little gain.

  5. Positive feedback differential set-up.

Various Comparator specifications are listed below:

Propagation Delay -The time difference between the input crossing the reference voltage and the output changing the logic state. Generally, comparators are fast

Input Offset -The difference between the input voltages at the instance where output voltage equals zero volts

Gain–Ideal Comparator has infinite gain and output jumps from low to high at a specific difference in input voltage. Ideal comparators will have a linear transfer curve.

There are multiple other parameters like output swing, Output type, input and output current and impedance but we will focus on above including hysteresis.

This webinar will discuss all design, layout and specification details using ngspice, Xschem and Magic



Who this course is for:

  • Beginner who is curious to know about circuit design and layout
  • Physical Design Professionals curious to know about IP design

Report abuse