VLSI - Essential concepts and detailed interview guide
4.3 (839 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
11,263 students enrolled

VLSI - Essential concepts and detailed interview guide

VLSI Academy
Bestseller
4.3 (839 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
11,263 students enrolled
Created by Kunal Ghosh
Last updated 3/2015
English
English [Auto-generated]
Current price: $135.99 Original price: $194.99 Discount: 30% off
5 hours left at this price!
30-Day Money-Back Guarantee
This course includes
  • 11.5 hours on-demand video
  • Full lifetime access
  • Access on mobile and TV
  • Certificate of Completion
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What you'll learn
  • To bridge the gap between Understanding and Application of Knowledge, this leads to innovation
Requirements
  • Individuals having Basic Knowledge of Electrical and Electronics
Description

This course is about Basic concepts of VLSI System Design. The course is designed in the form of micro-videos, which delivers content in the form of Info-Graphics. It is designed for self-learning and will help to polish the Industrial skills in VLSI World. This course will cover end-to-end description from basic Device Physics to Chip Design.The introductory video series focuses on the basic elemental physics and electrical characteristics of MOS Transistor.

This course covers most topics in brief and not in detail, just to revise topics below interviews. For detailed and thorough discussion of each topic, you need to go to individual courses.

All the best for your interviews and happy learning

Who this course is for:
  • Individuals keen to learn about VLSI and Chip World
Course content
Expand all 72 lectures 11:20:52
+ Physical Design Flow Overview
4 lectures 39:17
Netlist Binding And Placement Optimization
09:34
Clock Net Shielding
09:34
Route - DRC Clean - Parasitics Extraction - Final STA
09:33
+ Floorplanning
4 lectures 38:37
Utilization Factor And Aspect Ratio
09:10
Concept of Pre-placed Cells
09:27
Power Planning
10:26
Pin Placement And Logical Cell Placement Blockage
09:34
+ Placement
3 lectures 28:12
Netlist Binding And Placement
09:22
Optimize Placement Using Estimated Wire Length And Capacitance
10:02
Optimize Placement Continued
08:48
+ Timing Analysis With Ideal Clocks
4 lectures 37:00
Setup Time Analysis And Introduction To Flip-Flop Setup Time
09:44
Setup Timing Analysis With Multiple Clocks
08:49
Multiple Clock Timing Analysis And Introduction To Data Slew Check
09:06
Data Slew Check
09:21
+ Clock Tree Synthesis - Introduction And Quality Check Parameters
5 lectures 49:00
Introduction To Clock Tree Synthesis
10:05
Duty Cycle And Latency Check
10:15
Latency And Power Check
10:20
Power And Crosstalk Quality Check
10:46
Glitch Quality Check
07:34
+ H-Tree
3 lectures 29:30
H-Tree Algorithm And Skew Check
09:41
H-Tree Pulse Width And Duty Cycle Check
09:51
H-Tree Latency And Power Check
09:58
+ Clock Tree Modelling and Observations
3 lectures 28:51
Clock Tree Modelling
09:26
Clock Tree Building
09:58
Clock Tree Observations
09:27
+ Buffered H-Tree
5 lectures 50:44
H-Tree Buffering Observations
11:06
H-Tree Pulse Width Check And Issues With Regular Buffers
09:13
CMOS Inverter PMOS/NMOS Matching Switching Resistance Solution
09:51
H-Tree Clock Buffers And Pulse Width Check
10:48
Dynamic Power And Short Circuit Power
09:46
+ Clock Tree Optimization Checklist
3 lectures 26:07
Optimization Checklist
09:48
Leakage Current Reduction Technique
09:35
Optimized Clock Tree Power And Latency Check
06:44
+ Static Timing Analysis With Real Clocks
3 lectures 31:07
Static Timing Analysis With Real Clocks
09:48
Impact Of Unbalanced Skew On Setup Time
10:00
Impact Of Unbalanced Skew On Hold Time
11:19