VSD - Custom Layout
4.6 (159 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
982 students enrolled

VSD - Custom Layout

VLSI - This is where design meets fabrication
Highest Rated
4.6 (159 ratings)
Course Ratings are calculated from individual students’ ratings and a variety of other signals, like age of rating and reliability, to ensure that they reflect course quality fairly and accurately.
982 students enrolled
Created by Kunal Ghosh
Last updated 11/2016
English
English [Auto-generated]
Current price: $65.99 Original price: $94.99 Discount: 31% off
5 hours left at this price!
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This course includes
  • 4.5 hours on-demand video
  • 5 articles
  • Full lifetime access
  • Access on mobile and TV
  • Certificate of Completion
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What you'll learn
  • Draw layout from scratch, i.e. right from tech files to metal layer
  • Understand each and every mask level, through appropriate fabrication steps
  • Get to know how physical design flow communicates with CMOS fabrication process
  • This is how 2 different industries communicate
Requirements
  • Basic terms of CMOS, NMOS, PMOS
  • A brief summary of my existing course on 'Circuit design and SPICE simulations' will help, but can do even without that course
  • A brief knowledge of my existing courses on physical design flow and static timing analysis will also help
Description

Physical designers and CMOS fabrication team communicates with each other, and this course says it 'How?'

While physical designers use all the outputs from experiments performed by fabrication department, this course will demonstrate the best of both worlds and connect them through exchange of certain files in certain format

This way, custom layout designers get to know an insight how does fabrication works, fabrication engineers get to know, how layout engineers uses their information. So this course is a place where both meet, talk and connect. 

Also, the standard files needed to draw and simulate layout, are being taken, deduced and created from scratch and on the fly. This is, by far, the best way to understand layout, and I can promise you an exciting journey throughout this course

Course is structured to explain the CMOS packaging and fabrication steps in beginning, followed by software and files used to draw and simulate layout, and look into DRC rules.

Next, we will take a simple CMOS inverter and apply all concepts learned above. Finally, we will learn the 'Art of layout' using Euler's path. This is where you will solve complex functions and draw a layout out of it. 

Welcome you all to my course and Happy Learning!!

See you in class!

Who this course is for:
  • Anyone curious to know the inception of layout
  • Anyone curious to know the software behind layout drawing
  • Anyone who wants to know how chip designers talk with chip fabrication department
Course content
Expand all 36 lectures 04:33:30
+ Inception of layout - CMOS fabrication process
7 lectures 51:16
Create active regions
09:47
Formation of gate terminal
08:07
Lightly doped drain (LDD) formation
07:16
Source drain formation
04:24
Local interconnect formation
06:35
Higher level metal formation
08:47
+ Introduction to ‘corner stitching’ and ‘tech files’
7 lectures 49:33
Corner stitching introduction
10:05
Corner stitch to planes to tiles
07:26
Active tile types and tech file content
10:00
Contacts and styles
08:08
Connect section for circuit extraction
09:36
+ Design rule checking (DRC)
6 lectures 52:08
Introduction to DRC and lambda design rules
09:51
Poly to diffusion spacing and diffusion contact width rules
08:19
Metal1 width and poly to metal1 spacing rules
05:50
Contact spacing and minimum active width rules
08:34
From logic to layout to SPICE
09:03
+ Introduction to euler's path and stick diagram
3 lectures 30:05
Introduction to simple path, euler's path and euler's circuit
09:51
Introduction to stick diagram
10:28
Derive actual dimension from stick diagram
09:46
+ Art of layout using Euler's path plus Stick diagram
9 lectures 01:15:46
Pre-layout simulation
09:17
Layout using 'only' stick diagram
09:32
Improved stick diagram for new gate input ordering
08:34
Abstract layout from stick diagram
09:38
Derive actual dimension for Fn
10:02
Script to create layout
09:49