VSD - Custom Layout
- 4.5 hours on-demand video
- 5 articles
- Full lifetime access
- Access on mobile and TV
- Certificate of Completion
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- Draw layout from scratch, i.e. right from tech files to metal layer
- Understand each and every mask level, through appropriate fabrication steps
- Get to know how physical design flow communicates with CMOS fabrication process
- This is how 2 different industries communicate
- Basic terms of CMOS, NMOS, PMOS
- A brief summary of my existing course on 'Circuit design and SPICE simulations' will help, but can do even without that course
- A brief knowledge of my existing courses on physical design flow and static timing analysis will also help
Physical designers and CMOS fabrication team communicates with each other, and this course says it 'How?'
While physical designers use all the outputs from experiments performed by fabrication department, this course will demonstrate the best of both worlds and connect them through exchange of certain files in certain format
This way, custom layout designers get to know an insight how does fabrication works, fabrication engineers get to know, how layout engineers uses their information. So this course is a place where both meet, talk and connect.
Also, the standard files needed to draw and simulate layout, are being taken, deduced and created from scratch and on the fly. This is, by far, the best way to understand layout, and I can promise you an exciting journey throughout this course
Course is structured to explain the CMOS packaging and fabrication steps in beginning, followed by software and files used to draw and simulate layout, and look into DRC rules.
Next, we will take a simple CMOS inverter and apply all concepts learned above. Finally, we will learn the 'Art of layout' using Euler's path. This is where you will solve complex functions and draw a layout out of it.
Welcome you all to my course and Happy Learning!!
See you in class!
- Anyone curious to know the inception of layout
- Anyone curious to know the software behind layout drawing
- Anyone who wants to know how chip designers talk with chip fabrication department