Vivado Design Suite Walkthrough (Quick Guide for Beginners)

Name: Vivado Design Suite Walkthrough (Quick Guide for Beginners)
Rating: 4.4 (71 reviews)

Learn the basic tool flow with an easy and simple example

Created byUzaif Sharif

Last updated 8/2022

English

What you'll learn

Creating your first Vivado project
All basic steps with the detailed explanation
Vivado Design Suite interface and options
Fundamental flow from code to program the device

Course content

1 section • 5 lectures • 1h 34m total length

What's Inside?1:11
How to Install Vivado 2019.12:49
If you don't know how to install Vivado Design Suite then this is for you to watch and quickly get the steps.
Part 116:19
Practice a quick walkthrough of the Vivado 2019.1 interface, create an RTL project with Verilog sources, add constraints, and configure a Zybo Z7-20 board for synthesis and simulation.
Part 233:34
Part 2 walks beginners through the Vivado Design Suite interface, covering flow navigator, project manager, settings, simulation options, RTL analysis, synthesis, implementation, and IP catalog basics.
Part 340:08
In part 3 of the Vivado design suite walkthrough, learn to manage a project, edit Verilog sources, create test bench, simulate, constrain pins, synthesize, implement, and program Zybo using bitstream.

Requirements

You have to have Vivado Installed to start learning
Basic knowledge of digital logic

Description

AMD/Xilinx Vivado Design Suite is a toolset designed by Xilinx for the synthesis and analysis of HDL (Verilog\System Verilog or VHDL). It does have its own simulator, router, and IP integrator.

This course covers the fundamentals of the Vivado Design Suite IDE flow that includes
- Creating a simple project (an example design for learning purposes)
- Explanation of the Vivado Design Suite Interface and useful options in details
- Simulating it using the Vivado simulator (behavioral simulation)
- Doing RTL Analysis (viewing the circuit in terms of digital components i.e., adders, multiplexers, registers, etc,.)
- Writing up the constraints (pins locations properties, clocks, etc.,)
- Synthesize the design (exploring netlist)
- Doing place and route (add implementation runs)
- Generating the bitstream (binary file)
- Programming the device using Vivado Hardware Manager

If you are a student and just started learning the Xilinx FPGA chipset this course is for you
- OR -
If you are an FPGA hobbyist who is willing to learn Vivado for fun projects then you are at the right place to begin with
- OR -

Even if you are a working professional who is switching from other toolsets to AMD/Xilinx toolsets then you should be watching this series to make yourself familiar with the tool environment.
Happy Development!

Who this course is for:

Beginners who want start their journey with Xilinx FPGAs and toolsets
Hobbyists who want to learn Xilinx chipsets and tool flow
Professionals who have use other tools and want to switch to Xilinx tools