
This video provides the motivation behind developing this course, the importance of learning MBIST in modern VLSI design, the target audience, recommended prerequisites, and the unique aspects that make this course practical and industry-focused.
Explore memory structure and a 2D array of memory cells using address decoders and write drivers. Identify fault types and memory testing algorithms, including built-in self-repair.
Explore MBIST memory testing algorithms, including S and LV families and patterns like check board, walking, and galloping, to detect diverse faults with scalable, fast coverage.
This video introduces Synopsys SMS and explains its role in MBIST insertion and memory testing in modern SoC designs.
Explore memory wrappers in MBIST, including the wrapper logic, controller part, and memory interface, and contrast dedicated versus shared wrappers for a standardized interface.
Explore MBIST controller architecture from top-level to low-level controllers, including medium-level controllers, data and clock control, wrappers, and IEEE interfaces with test data generation.
Explore mbist network architecture types for memory testing under power budgets, detailing star, ring, and hierarchical topologies and their tradeoffs in parallelism, debugging, routing, and scalability.
Explore industrial DFT and MBIST implementation, including flat and hierarchical designs. Understand MBIST flows within the overall chip flow and industry insertion approaches.
Explore flat versus hierarchical designs for SoCs, and how dft and mbist flows differ in scope, debugging, and scalability across block and top levels.
Discover how MBIST is implemented in industry through non-linear rtl to tape-out milestones, with ongoing dft, apr, sta work, design feedback, and even third-party dft services.
Configure mbist and organize memory grouping for flat design. Build, verify, and generate mbist patterns for simulation and ATE; align timing constraints for RTL to GDSI flow.
Explains MBIST flow for hierarchical designs, performing three level-specific M-based implementations—low, medium, and top—by reusing test models from lower levels and aligning with the flat flow steps.
Compare flat and hierarchical mbist insertion flows, highlighting when to use each for small versus large designs, and outlining impacts on runtime, debugging, planning and coordination, and integration.
Discover how Synopsys tools support MBIST implementation, from TestMX Manager for test patterns to Primetime, Design Compiler, Fusion Compiler, and VCS and Verdi for design, simulation, and debugging.
Explore mbist-based dft flow with Synopsys tools: TestMixManager for SMS and pattern generation, Primetime for timing, DesignCompiler or FusionCompiler for synthesis, plus ICCompiler for APR layouts.
Learn how fault injection verifies MBIST-based memory repair in SoCs, using e-fuse data, vendor-specific fault mechanisms, and a three-step simulation workflow.
Memory Built-in Self Test (MBIST)-An Industry Perspective
Master the fundamentals and industry practices of Memory Built-In Self-Test (MBIST) with this practical, industry-oriented course designed for VLSI engineers, graduate students, and semiconductor enthusiasts. As memories occupy a major portion of modern SoCs, MBIST has become an essential part of achieving high test quality, reliability, and manufacturability in advanced chip designs.
In this course, you’ll learn MBIST concepts and implementation methodologies used in leading semiconductor companies, explained in a simple and structured manner. Unlike many theoretical courses, this course focuses heavily on industrial MBIST information, insertion flows, and real-world DFT integration techniques used in production chips.
You’ll gain hands-on understanding of:
Memory architectures and common memory fault models
Memory testing algorithms and MBIST fundamentals
MBIST controllers, wrappers, and network architectures
Built-In Self-Repair (BISR) concepts
Flat vs. hierarchical MBIST insertion methodologies
Complete MBIST implementation flows used in modern SoC designs
Some secret industrial knowledge which is part of the course
Whether you are a fresh graduate, DFT engineer, RTL designer, physical design engineer, verification engineer, or someone preparing for VLSI DFT roles, this course provides condensed industry knowledge that typically takes months to learn through documentation, user guides, and on-job experience.
By the end of this course, you will have a strong understanding of MBIST architecture, testing methodologies, insertion flows, and industry-standard implementation practices used in real-world semiconductor designs.
This course was personally designed by me after spending months learning MBIST through industry projects, user manuals, tool flows, technical documents, and practical implementation experience. I have condensed that learning into a structured and easy-to-follow course that reflects real semiconductor industry practices.