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FPGA Embedded Design, Part 1 - Verilog

Name: FPGA Embedded Design, Part 1 - Verilog
Rating: 4.4 (1142 reviews)

Learn FPGA embedded application design starting with the basics and leaving with your own working designs.

Created byEduardo Corpeño, Marissa Siliezar

Last updated 3/2022

English

English [Auto],

What you'll learn

Design hardware behavior with the Verilog Hardware Description Language
Simulate Verilog Modules.
The curriculum will take you by the hand through learning Verilog.
In the series, you'll learn how to simulate your designs, how to make them real in an FPGA, and finally how to design and use your own Soft Processor
This first course is about the Verilog Hardware Description Language.
This is NOT a System Verilog course. However, learning Verilog is a starting point if you want to learn System Verilog (Similar to learning C prior to C++).

Course content

11 sections • 74 lectures • 3h 42m total length

Course Structure3:25
Learn the logistics of the course.
Instructor Introduction0:40
Meet the instructor. See the big picture.
Motivation: Hardware Design3:00
Learn about the FPGA design process and why it's useful.
Motivation: Let's make a CPU!0:44
Let's set a goal for this whole body of knowledge. Let's think big: How about designing your own microprocessor?
Let's review the typical blocks inside a CPU and how they can all be designed, simulated and implemented with a Hardware Description Language.
Motivation: CPU Design1:27
Understand why CPUs are digital by examining the ALU, registers, and multiplexers, with historic microprocessors like the Zilog Ziad and Intel’s first processor.
Useful Software0:28
In this course we'll perform a lot of simulations, so it's important that you choose your development platform, which typically consists of hardware and software.

Digital Circuit Design2:02
Let's start our refresher on digital circuit design!
Logic Gates0:47
Logic gates are the basic foundation element of digital design, and correspond to logical operations such as AND, OR and XOR.
Boolean Algebra0:16
Boolean algebra is a very basic tool in computer science for pretty much everything. Let's see some important details.
Combinational Logic - Muxes and Demuxes4:12
Multiplexers and demultiplexers are two of the most popular building blocks of combinatorial logic. Let's learn about their use.
Combinational Logic - Logic with Multiplexers2:54
Combinational Logic - Logic with Demultiplexers2:01
Explore how demultiplexers use selection lines and a default zero to route inputs, and show how a d-multiplexer can implement many functions with or gates.
Combinational Logic - Inside Multiplexers and Demultiplexers2:56
Arithmetic with Gates5:43
Demonstrate how arithmetic can be implemented with logic devices by building binary addition from half adders, full adders, and a ripple adder, with decimal and binary examples.
Adders with Gates4:31
Explore adders with gates by building half adders and full adders, illustrating xor sum and and carry functions, then implementing a ripple carry adder in Verilog.
Sequential Logic5:52
Explore sequential logic as the time-aware counterpart to combinational systems, and learn how flip-flops and synchronous edge-triggered devices form state machines.
Tri-State Buffers5:04
Explore tri-state buffers and their high-impedance state, enabling safe bus architectures by allowing multiple devices to share a line without short circuits.

Before we start...2:55
Learn about concurrent logic in Verilog modules.
No, Wait. This is all concurrent!3:05
It's very important that you understand how the concurrent model works.
Verilog Code Structure3:52
Learn about descriptive modules and test bench modules.
Descriptive Modules4:26
Learn about the elements in a descriptive module.
Test Bench Modules6:43
Learn about the organization of a test bench module and how to use one.
Some details about Verilog0:51

EDA Tools2:34
Explore electronic design automation software suites that automate hardware design, review edk tools, and preview ideate playground and model sim for simulating modules.
Typical Steps in EDA Suites5:18
Explore the typical steps in an EDA suite, from schematic capture and simulation and analysis to PCB design, software development, and FPGA design, emphasizing digital simulation and verification.

Creating a Playground4:41
Setting up a Playground4:19
Set up your FPGA playground by choosing Verilog, selecting tools and simulators (commercial or free), open an account if needed, save the project, and share the link with peers.
Entering Descriptive Code6:44
The code is available for download for you to follow along if you want.
Entering Test Bench Code3:23
Entering display System Tasks5:24
Explore Verilog system tasks such as finish and display to control simulation end points, print values to the console, and inspect signals with timing diagrams and a logic analyzer view.
Simulating with display Tasks4:28
Run a Verilog simulation by delaying display statements to respect gate propagation, verify xor with unknown x, and use dump file and dump vars for IP Wave logic analyzer view.
Simulating with EPWave5:29
Explore simulating with EPWave, inspect signals and the xor result, and optimize waveform viewing by resizing the window, using a separate waveform viewer, and adjusting the time scale precision.
Simulating with GTKWave5:03

Download and Installation Tips4:04
Download and install the Intel Quartus light edition (free, no license) to simulate with model sim, select cyclone 5 devices, and prepare for synthesis and board deployment.
Compiling4:36
Create a new ModelSim project, add a test bench and a descriptive module, save both files, and run compile all to produce two compiles with zero errors.
Simulation Setup1:39
Waveform Simulation5:58
Launch the simulator, select signals like A and B, and run the test bench to view waveforms in the waveform viewer, with console outputs and run-length control.
More on Timescales3:52
Master timescales and precision in Verilog simulations by adjusting time scale and nanosecond steps, ending and running simulations, compiling files, and analyzing waveforms and xor gate behavior.
More Features1:44

Wires and Registers2:16
Learn about the net elements of Verilog.
Number Representation: Logic Values3:51
Learn the syntax to represent Logical Values in Verilog.
Number Representation: Integers3:25
Learn the syntax to represent integers in Verilog.
Logic Gates1:07
Learn about these primitives of Verilog.
The Basics
Higher-Level statements0:54
Learn an easier way to enter your circuit behavior in Verilog.
Data Assignments1:47
Learn your options when it comes to performing different assignments in Verilog.
Multiplexers and Demultiplexers0:19
Learn one way to implement multiplexers and demultiplexers in Verilog.
case statements
if-else
Hardwired assign
Tri-State Buffers in Veriog3:41
Learn how to make Tri-State Buffers in Verilog.
Tri-State Buffer Implementation in Verilog1:10
Let's see an implementation of Tri-State Buffers in Verilog.
Sequential Logic7:21
Learn how to implement state machines in Verilog.
Sequential Logic Example in Verilog1:03
Blocking vs Nonblocking Assignments3:18
Assignment example in EDA Playground2:44
Go ahead and download the code to try it yourself!
Blocking Results3:06
Nonblocking Results3:21
Examine nonblocking results in Verilog by tracing clock edges and updates of X, Y, and Z, with hex and decimal conversions such as 10×10 = 100.
Nonintuitive Results0:58

Let's make a 4-bit Adder!2:19
Explore a modular 4-bit ripple carry adder implemented in verilog, using three full adders and a half adder to produce a 5-bit sum c from 4-bit inputs a and b.
A Verilog Implementation4:52
Download the code for your own simulations.
Simulating with Multiple Source Files1:47
Learn to simulate with multiple source files by configuring compile and run options, listing each source file, and handling unknown modules during run.
Simulation0:52
Test Bench1:52
Propagation Delays4:12
An Alternative Implementation in Modelsim3:23
Code Available for Download!
Multiple Bit Signals in Modelsim4:14
Simulate a Verilog test bench in ModelSim, observe multi-bit signals in waves, compare binary and decimal views, and use bitwise extension to debug unsigned and signed values.
Design an ALU

Let's make an Up/Down Counter!1:27
Explore a Verilog up/down counter that uses an updown input (1 for up, 0 for down), responds to falling clock input edges, and provides an 8-bit count with minimal inputs.
A Verilog Implementation2:50
Source code available for download :)
Simulation1:46
Simulate a counter driven by an updown control, counting on the clock's falling edge with hexadecimal values from 0 to f. Behavioral description lets the compiler implement it without micromanagement.
Design a Digital Clock

Requirements

Basic programming knowledge sometimes helps, but the case of no programming experience can be an advantage since you will learn something other than traditional sequential programming.
Although a refresher is provided in this course, some basic digital electronics knowledge always helps. Not necessarily advanced stuff, just the basics: Logic gates, maybe flip flops, counters, tristate buffers, etc.
Ultimately, an FPGA development board will come in handy to build and test your projects. We'll use it starting at the second course in the series.

Description

Do you feel you've learned enough about microcontrollers? Do you want to learn more embedded application design techniques? How about a technique that will allow you to design high-performance systems the way professional equipment designers do?

If you're still interested, this curriculum is for you. The FPGA Embedded Design series will teach you the exquisite art of FPGA design.

So what is an FPGA anyway?

Before moving on, let me tell you that an FPGA is not a microcontroller. It's not a computer. Well, at least not if you don't want it to be a microcontroller or computer.

The simplest explanation of an FPGA I've found is that it's a shape shifter! It's an integrated circuit that will behave as the logic circuit you'd like, and the way of letting it know the desired behavior is, yes, you guessed it, through programming.

But you will not do this with a Programming Language, but with a Hardware Description Language!

In this course, you'll learn Verilog, which is one of the most widely used Hardware Description Languages (along with VHDL). You'll learn the concurrent paradigm in the Verilog code and how to design digital systems with this powerful language. You'll also learn that there are many purposes of an HDL: System design, simulation, implementation in either a traditional chip, or the popular FPGA alternative.

Don't let this opportunity pass. Take the first step into the other side of embedded systems: FPGA Embedded Design.

Who this course is for:

Anyone who wants to learn FPGA design.
Arduino Makers who want to take the next step into embedded systems.
Hardware engineers who would like to learn about the exciting field of FPGA design
This course is not for experienced embedded engineers specialized in FPGAs.

FPGA Embedded Design, Part 1 - Verilog

What you'll learn

Explore related topics

Course content

Introduction6 lectures • 10min

Hardware Description Languages4 lectures • 10min

[Optional] Refresher on Digital Circuit Design11 lectures • 36min

The Verilog Hardware Description Language6 lectures • 22min

Software Tutorial2 lectures • 8min

Quick Overview of EDA Playground8 lectures • 40min

Quick Overview of Modelsim6 lectures • 22min

Coding Elements of Verilog16 lectures • 40min

A Combinational System Example8 lectures • 24min

A Sequential System Example3 lectures • 6min

Requirements

Description

Who this course is for: