
Learn how processor-based systems work, design and implement your own CPU in HDL, and synthesize and simulate it on an FPGA, with videos, assignments, demos, and remote labs.
Learn the role of synthesis in FPGA design, then run simulations with a test bench to validate hardware and the microprocessor, avoiding big bank testing and common coding mistakes.
Describe simulated hardware for fibonacci and factorial programs using shared hardware. Feed a into input port zero, trigger strobe to s after each calculation, and increment a for next result.
It's time to take on a Challenge! How does designing a CPU sound?
In this fourth part of the FPGA Embedded Design series, we'll design a CPU from scratch to finally get it up and running on several platforms.
We'll write most of the code in the Vivado Design Suite, but you'll have the chance to see it working as well in Quartus Prime, EDA Playground or LabsLand, so you can follow along with your favorite tools. The FPGA boards we'll use are the BASYS3, by Digilent (with a Xilinx FPGA), and the DE0-CV from Terasic (with an Intel FPGA).
This course consists of three main parts:
Foundations of Computer Architecture, where we'll cover the essentials of CPU design and jargon.
Design of our own CPU, where we'll make several design decisions to come up with a soft processor that meets our needs.
Hands-On Development, where we'll write the code, simulate and finally get our CPU into an FPGA board. No purchases are required for this part, but it sure helps to have your own board to follow along, and keep on tinkering in the future with your new soft processor.
What are you waiting for? Let's have fun designing a CPU!!!