This course is a thorough introduction to the VHDL language. VHDL (VHSIC Hardware Description Language) is a versatile and powerful hardware description language which is used for modeling electronic systems at different levels of design abstraction. This provides a foundation in RTL and test bench coding styles needed by design and verification engineers who are new to VHDL. This Sessions addresses targeting Xilinx FPGA devices to make sure you understand the whole process from simulation to FPGA. There is a lecture section for each main topic. Lectures contain numerous examples that show both syntax and coding style. This presents a basic foundation for the language. The Knowledge gained can be applied to any digital design by using a top-down or Bottom-up synthesis design approach. This course combines lectures with lab exercises to strengthen key concepts.
The Main goal of this course is give you an overview of the VHDL language and its use in logic designing including VHDL syntax , build models using language constructs such as assignment, process statements, if statements, case statements and loops and coding styles . To make you familiar with developing a RTL VHDL model to understand the synthesizable subset of VHDL and writing a verification test cases and User constraints files for that model.
Who should take this course?
This course is designed for designers who are new to VHDL and who wish to become familiar with the language with a particular emphasis on writing RTL code for synthesis. And Engineers who want to use VHDL effectively for modeling, design, and synthesis of digital designs.
At the end of the course, students will be able to:
After the course students with little or no VHDL knowledge will finish this course empowered with the ability to write efficient hardware designs and perform high-level HDL simulations. and
What will students need to know or do before starting the course? :
I, Hassan Uddin Shaik, having vast experience in the field of Embedded Systems and VLSI. I have 8+ Years’ experience and worked in major fields of Embedded Systems and VLSI.
Programming Languages known: Assembly, C, C++, JAVA, J2ME
Database: MS-Access, ORACLE
ScriptingLanguages: HTML, PHP
OperatingSystems: DOS, UNIX, WINDOWS, LINUX, FreeRTOS, MicroCOS-III.
HardwareKnowledge: Knowledge of hardware components, Networking and Embedded Systems.
Microcontrollers: ARMCortexM3–LPC1768, TI-LM3S89, STM32, ADE7xxx (Analog Devices), ARM7TDMI–LPC2148, MSP430x42x(Texas Instruments), AT89S51, Atmega, PIC18F, Xmega, FPGASpartan
IDE: Kiel, IAR, Atmega(AVR)studio, Mplab-x
Tools: COMSOL, L-Edit, SUPREME, CASINO, ACESSimulations, SPIP, BSIM, NGSPICE, PSPICE, MOSES1.2,
Microtek (Simulating Software), Synopsys, Cadence, SOC Encounter, Xilinx
EducationProfile: Ph.D : Pursuing at Jodhpur National University (expected to finish by January 2016); M.S-MicroNanoFabrication from DTU (Denmark Technical University-Denmark); M.Tech– Nano Electronics from VIT University (Vellore– Tamilnadu); B.Tech–Electronics and Communications from DVRCET–JNTUH.
ResearchProfile: ResearchFellow at KTH–Sweden(2 months), Research Fellow at UTO(University of Oldenberg)–Germany (2 months); Research Fellow at EPFL–Zurich (2 months); Research Fellow at JNCASR (IISC -Bangalore); Research Assistant at UUM (Universiti Utara Malaysia)
Journals: Nano bits: customizable scanning probe tips
Published in – IOP Nanotechnology