
Verilog Basics: Syntax, Nets, Ports
CMOS NOR gate explained with verilog code
Different operators used in dataflow modeling with verilog code of 4 bit full adder explained
Different important statements used in verilog - initial,begin-end,always,for,while,repeat and forever
Summary of Gate level, switch level, data flow and behavior modeling in verilog
Learn to draw state diagram for the given sequence using Mealy FSM
Learn to draw a state diagram for the given sequence
Learn to draw a state diagram for the given sequence
Learn to draw a state diagram for the given sequence
Learn to draw a state diagram for the given sequence and write its verilog code
How D flip flop works and how to write its verilog code
How T flip flop works? and how to write its verilog code?
Course contains different modeling styles like Gate level,switch level, data flow and Behavior modeling, Verilog design of Basic gates, Multiplexers, Demultiplexers, Encoders, Decoders, Flip flop, registers, counters and Finite state machine ( Mealy and Moore machine ) along with its detailed explanation,loops, if-else condition, case structure, arrays, inheritance in object oriented programming.