VLSI Design Engineering - with VHDL/Verilog basic hands on

Name: VLSI Design Engineering - with VHDL/Verilog basic hands on
Rating: 3.2 (5 reviews)

Understand the world of VLSI[Very Large Scale Integration] Design&Related Processes/Concepts [Verilog and VHDL-Hands on]

Created byRajeev Raghu Raman Arunachalam

Last updated 8/2023

English

English [Auto],

What you'll learn

VLSI [ Very Large Scale Integration] Engineering: A journey from Beginner to Intermediate - Covering Most of the basic concepts of VLSI like ASIC & FPGA Design Flows & related concepts, Basic Coverage of VHDL and Verilog on EDA Playground tool + Many more

Course content

1 section • 12 lectures • 1h 56m total length

Introduction5:35
This lecture covers Instructors brief introduction, along with syllabus and Course Pedagogy.
ASIC/FPGA Design Flow17:46
ASIC/FPGA Design Flow & related Concepts, their difference and also Digital Design Concepts + more..
VLSI - Physical Design Considerations13:14
This Lecture covers VLSI -ASIC/FPGA - Design COnsiderations like Die -Height & Width Calculation, PReplaced Cells, Netlist Binding, Glitch and more + ...
VLSI Fundamentals - Deep Dive Concepts16:58
VLSI -Deep Dive Concepts 28:59
This lecture covers concepts like Noise Protection, H- Tree Concept etc..
VLSI _Deep Dive Concepts 311:02
This Lecture Covers concepts like Solutioning Noise concerns, Design Rule Check (DRC) + Others..
VLSI - Verilog Introduction9:40
This Lecture covers basic Verilog introductory Concepts
VLSI - Verilog Continued6:25
This lecture goes 1 step beyond and explains the frequently used terminologies and Know How's in Verilog like Description and Test Bench Module , FPGA Design Steps.
VLSI - Verilog Hands On.7:19
This lecture covers Verilog Hands On with EDA PlayGround tool overview , related program etc..
VLSI - Verilog and VLSI related additional Concepts8:38
This Lecture Covers Key Verilog and VLSI related terminologies : Like number format, Statement Format, Tri State Buffers + more..
VLSI - Verilog - Hands On2- Program4:44
This Lecture Covers - Verilog Hands On(another session) where we walk through an example.
VLSI - VHDL - Concepts & Hands On6:21
This Lecture Covers - Introductory Concepts and Hands On on VHDL.
Course Final Assesment

Requirements

Not much - Basic level education and willingness to learn should be sufficient, Some on the fly supportive reading should suffice.

Description

This Course, gives an insight into VLSI(Very Large Scale Integration) Design Engineering and in this regard we cover Concepts like ASIC & FPGA design flow concepts and related design considerations . It also Covers noise protection techniques and some related deeper concepts as well. Finally we will also cover Verilog and VHDL at an intermediate level with examples. We sincerely believe this course will benefit Career Shifters who want to enter VLSI Design Engineering World also to Fresh graduates and those curious about VLSI Design Engineering. We hope this course brings value to you. We wish you all the best!

We start with basic concepts and slowly progress to advanced concepts. The course is offered in a semi simple mode where complex technical jargons are kept at bay. The definitions and illustrations are provided in a way so as to blend theory with Practicality. This course will form the foundation for further knowledge enhancement in the field of VLSI Design Engineering. In this age of Information Technology VLSI. plays a key role in shaping the new age Technology. This is the right time to cash in on this Course and enhance your Industry skills in the field of VLSI. Design. Following this course, understanding the Concepts and augmenting it with some parallel additional learning will help you reach new heights in the field of VLSI Design Engineering.

Who this course is for:

Prospective Students curious to know about the VLSI world, or wanting a Career change into VLSI, Freshers wanting to get knowledge on VLSI and Get Certified or Job Ready, etc..