UPF Power Aware Design & Verification
What you'll learn
- What does UPF mean and why is it required?
- UPF Low Power Design
- UPF Low Power Verification
- Learn a new skill that will help prepare for a Job in the Semiconductor Industry
Requirements
- Fundamentals of Digital Design (Digital Electronics and Circuits)
- Basic knowledge of Functional Verification and RTL Simulation
- Passion to learn Power Aware UPF Design and Verification
- TCL basics are good to know but not mandatory
Description
Exhaustive course spanning across 6+ hours of on-demand video lectures.
Comprises of 4 major sub-sections:
Need of UPF and UPF Basics (~1 hour 1 min)
+ VLSI Design Phases
+ RTL Simulation Vs Power Aware UPF Simulation
+ UPF Basics
UPF Power Aware Design (~2 hours 51 mins)
+ Power Domains
+ Supply Nets/Ports – Power Supply Network
+ Supply Sets – Power Supply Network
+ Power Switches
+ Power State Table
+ Level Shifters
+ Isolation Cells
+ Input Vs Output Isolation Cells
+ Retention Cells
+ Flat UPF Vs Hierarchical UPF
+ UPF Evolution 1.0 Vs 2.0 Vs 2.1 Vs 3.0
UPF Power Aware Verification (~2 hours 4 mins)
+ Popular Power Saving Techniques
+ Static Verification
+ Dynamic Verification 1 – Controlling Power Supplies
+ Dynamic Verification 2 – Simstate Modelling
+ Dynamic Verification 3 – Power Coverage
+ Dynamic Verification 4 – Low Power Assertions
Miscellaneous Concepts (~11* mins)
+ Instrumentation Vs Instantiation
+ Hard Macros and Liberty Files
* New lectures might be added based upon popular user feedback and request.
Who this course is for:
- VLSI Semiconductor Professionals/Enthusiasts
- People looking to ramp-up on Power Aware UPF Design and Verification
- Folks working on UPF Power Aware Design and Verification
- Professionals/Students looking to add a new skill to enhance job-opportunities
Instructor
Co-author of the best selling book "Cracking Digital VLSI Verification Interview", Robin is famous for his courses UPF Power Aware Design & Verification, Digital Electronics and Circuits, and Power of Perl.
Alumnus of BITS Pilani, Robin has extensive experience architecting, developing, and leading Functional and Power Aware Design Verification at IP, SS, and SoC levels. He has successfully led complete product verification life-cycle for multiple generations of Server/PC Graphics/Mobile/Modem/IoT products.
In his free time, Robin mentors Engineering/STEM students in association with various non-profit organizations and volunteers for social causes. In the past, he has worked as a Mentor with organizations viz. The New York Academy of Sciences, USA, Villiers Park Educational Trust, UK, and Mentor Together, India.