TI TMS320F28379D Microcontroller for Power Electronics

Achieve safe hardware setup for TI TMS320F28379D by installing Code Composer Studio and Visual Studio Code, compiling and flashing a light-emitting diode project, and following de-energize guidelines to avoid damage.

Learn to configure gpio pins as digital outputs, drive them high or low, and use LEDs on a breadboard to visualize microcontroller control.

Compare driver lib and bitfield project options for the f28379d in code composer studio 20, highlighting register mapping, api style, and dual cpu trade-offs.

Learn to implement a dual-cpu gpio project by initializing the system and configuring three gpio pins—cpu1 controls gpio 22 and 97, cpu2 controls gpio 52—using detailed mux and direction settings.

This lecture shows driving gpio 52 from cpu2 after cpu1 configures clocks, using driver lib wrappers to set pin level in a loop, with push-pull vs open-drain and pad config.

Compare using driver lib gpio functions with writing your own specialized code. Learn to access gpio registers via hardware registers, base addresses, and 32-bit vs 16-bit memory maps.

Connect LEDs to GPIO pins with a series resistor, honoring polarity (anode to high potential, cathode to low), and never drive directly to ground.

Conclude the GPIO setup section by highlighting project configuration in Code Composer Studio, header files, and register access. Explain bitfield and driver library approaches and preview clocks and PLL configuration.

Review the bitfield project and its init control, clock, and watchdog setups. Examine PLL configuration, oscillator selection, and pi vector table with timer interrupts and interrupt service routines.

Set up two timer projects for the F28379D: configure a driver-lib cpu one and a bitfield cpu two, add include paths and clock symbols, and enable interrupt service routines.

Utilize interrupt service routines to toggle gpio pins with a dual-cpu setup; cpu1 uses timer zero and timer one to toggle pins 22 and 97, cpu2 toggles pin 52.

Configure cpu timer zero and timer one from 200MHz clock by stopping timers, loading period values, enabling interrupts, and using a prescaler in free running mode to set intervals.

Configure global interrupts by enabling timer zero and timer one in the interrupt enable register and selecting int1 and int13 from the vector table. Then enable the global switch with eint so interrupts reach the processor and you can implement the ISR and start the timer.

Configure gpio pins 22, 52, and 97 as outputs, assign pin 52 to CPU two via mux and select registers, and prepare the CPU timer control for starting timers.

Explore the enhanced pulse width modulation module of the TI TMS320F28379D, building on timer and interrupt lessons to generate open-loop gating signals and flexible pwm strategies.

The action qualifier submodule generates gating signals for pins A and B by merging time-based and counter-compare inputs, enabling independent, complementary, or identical PWM across 24 pins.

Assign module five to cpu two, enable clocks to modules one and two via peripheral clock control and cpu sis registers, then enable tb clock sync for pwm counting.

Configure ePWM time bases for IPMs via cpu registers. Reset time base sync before counting to start independent PWM timers; note deadband, event triggers, and trip zones.

Configure the counter compare control register to enable shadow mode and load from the shadow register at the PWM cycle start, with a 0.6 duty ratio for a 3332 period.

Configure the action qualify sub module using the driver lib function. Initialize and update actor A and actor B settings for ep four and ep five—sawtooth and triangular waveforms.

Register the pwm interrupt by placing the epwm1 isr address in the pi vector table and declare it as an interrupt service routine, then enable group 3 and global interrupts.

Program CPU two by duplicating CPU one steps for driver lib, and enable PWM five interrupts by setting int select to three for start and middle of PWM cycle.

Configure the trip zone interrupts and map the interrupt service routines for pwm five ts and ipm five ts, then enable them in the pi vector table group two.

Execute the trip zone project by wiring gpio 97 to 3.3V to disable the active-low input, then ground gpio 97 to block gate signals on PWM and epm2.

Explore the f28379d adc modules A through D, their 16 input pins and 0–3.3 v range via reference configurator, 12- or 16-bit results, soc/eoc flow, and the post-processing module.

Configure start-of-conversion routing to multiple channels, assign SoC signals to ADC pins, and set up 16 SoC control registers with channel, trigger, and acquisition window settings for round-robin, priority-based sampling.

Set up an adc project in Code Composer Studio, assign cpu1 to adc module a and cpu2 to module c, configure a0/a1 and c3/c5 pins, plan two-input gpio mock signals.

Compile and fix the adc project by resolving missing includes and linking errors in the bitfield build, adding the f28x project and F2 text project, then proceed to CPU two.

Review the bitfield PWM setup, including clocking, CPU assignment, and time-base start. Configure the event trigger, SOC pulse, and dead band to produce a synchronized PWM signal.

Configure adc project on the tms320f28379d by enabling soc signals to the adc module, setting pwm to a fifteen kilohertz sawtooth with shadow mode, cmp, and deadband, then start timer.

Configure a0 and a1 to listen to the soc signal in a round-robin sequence. Enable adc interrupt one to fire when eoc0 and eoc1 complete.

Map the adc a1 interrupt to the pi vector table and define its ISR. Enable adc a1 in pi ier1 group one and activate the iar global level.

Make volt and current global to observe them in debugger and ISR, then enable the ADC module clock and set PC CR 13 for ADC configuration in Code Composer Studio.

Configure adc channels (c3 and c5) in single-ended mode by setting soc zero ctl and soc one ctl, using driver lib examples to map bit fields and set pwm trigger.

Configure adc interrupts for two channels, enable adc interrupt one after the last conversion, register the adc ISR, and enable pi group one interrupt to finalize ADC interrupt setup.

Execute the adc project and verify readings by wiring pins a0/c3 and a1/c5, then use the debugger watch window and registers to monitor volt and current values.

Explore how the IPC module enables two CPUs to communicate via a shared message RAM. Use flag and status registers with data, address, and command registers, plus configurable interrupts.

Implement an IPC interrupt service routine, acknowledge the IPC and Pi module interrupts, read the 32-bit duty ratio from CPU two, cast to 16-bit, and update the PWM duty.

Observe how the IPC module links cpu one and cpu two to exchange data and notifications, driving pwm gate pulses with varying duty ratios as flux crosses thresholds.