
Explore the architecture of the IBM PC 5150, from its motherboard and CPU to memory, graphics, and floppy controllers, and understand how the 8088 and x86 processor drive early computing.
Sign up, set pace to two weeks, and watch once without notes to decide if the course fits (refund within a month). Then rewatch at pace, take notes, and summarize.
Examine the IBM PC 5150 motherboard by listing its main chips—8088 CPU, 8259, 8255, 8237, 8253, 8288, 8284—and understand their interactions to explain board behavior.
Learn how the cpu distinguishes instructions from data using memory, buses, and a control unit to fetch, decode, and execute code, and how registers resolve related timing issues.
Explore how the 8086 uses segmentation with CS and IP to form a 20-bit address. CS shifts left and adds IP to create 64kB segments.
Explain that a microprocessor's architecture is defined by the ALU width, not the address or data bus, using 16-bit registers and 16-bit ALU examples with 20-bit addressing.
Explore machine cycles in 8086/86/88 microprocessors, detailing fetch, decode, and execute steps, memory interactions, and how the bus interface unit and execution unit coordinate outside world operations.
The lecture explains how a separated EU and BIU architecture enables overlapping fetch and execute with memory operations, using a multi-instruction example and a fetching queue.
Explore how the IBM PC 5150 CPU uses clock transitions on pin 19 to trigger machine cycles and operations, generated by the 8284 clock generator from a 14.318 MHz oscillator.
Explore five machine cycles of the IBM PC 5150 processor, with three reads (memory, io, and into) and two writes (memory and io), and interrupt routing via 8259 and 8288.
Explore how the IBM PC 5150 uses the 8088 to generate address and data buses via latches and transceivers, driving RAM, ROM, and input output chips.
Explain machine cycles in minimum mode, detailing how the cpu reads and writes memory or io, uses memory address and data buses, and interfaces with 8282 latches and 8286 transceivers.
Explore how the IBM PC 5150 uses multiplexed address and data buses with latches and transceivers to drive RAM and I/O, including 373, 8282, and 245 devices.
Explore how the 8088 maximum mode uses S0, S1, and S2 with the bus controller and 8288, driven by the 8284 clock, to generate signals and latch memory addresses.
Explain how the 8088 maximum mode uses the 8288 bus controller to generate memory and io signals, manage transitions, and implement wait states for memory access.
Discover how 16-pin dram chips on a motherboard form 16kB memory, organized as 128 rows by 128 columns, using row address strobe and column address strobe signals.
Analyze the timing diagrams for memory in the IBM PC 5150, detailing row and column addressing, RAS and CAS signals, and the required hold times.
Refresh memory keeps data by refreshing the same 128 rows across all 36 ram chips, preserving data within four milliseconds in IBM PC 5150 through hardware refresh driven by timers.
See how the IBM PC 5150 uses seven 8221 multiplexers, via addr select, to create 14-bit row and 7-bit column addresses for 36 RAM chips wired as arrays.
Learn how RAS and CAS signals address 36 memory chips to map the first 64 KB of the IBM PC 5150 memory, with a DMA-driven refresh gate activating row selects.
Explore how the IBM PC 5150 decodes row and column addresses to RAMs, and how RAS/CAS timing governs memory read/write on the bus.
Understand how the processor reads ROMs in the IBM PC 5150 via a decoder that activates a single ROM at a time, mapping BIOS ROMs to the last 64 kilobytes.
Explain how a 3‑bit decoder activates the CS lines (CS0 to CS7) from A13–A15 to access the BIOS ROM on the IBM PC 5150, clearing the interrupt flag.
Explore parity check in IBM PC 5150 memory, preserving parity between writes and reads, and note the trade-off of adding one extra ram per eight rams.
Learn how parity checks operate in the IBM PC 5150, using the S280 parity RAM to write data based on the even or odd parity of nine inputs.
Explore parity check implementation in the IBM PC 5150, detailing how i of odd and i of even detect data integrity during reads and trigger the NMI.
Explore how the IBM PC 5150 masks the non-maskable interrupt by using the IOW signal to write zero to the NMI register at address range 0A0–0BF, enabling self-testing in BIOS.
IBM PC 5150 is arguably the first personal computer and was made in 1981, from then on almost any computer that you see is an improvement of that first computer.
But there has never been any course or book analyzing maybe the most important computer of all time, there has been a lot of courses talking about "how to create a computer", which I, myself, have created a course called "creating a cpu using transistors and logic gates", in which we created a computer from scratch. The reason for this, is because IBM PC 5150 (or any other REAL-WORLD computers- meaning computers that have been created by companies and have been sold in the world- is much more complicated than a computer that you could create on your own, in your garage or using software.
When we look at the motherboard of IBM PC 5150 we see so many chips that feels so complicated, and the reality of it, is that it is really complicated, in fact if it was easy everyone would have known that. What we have done in this course, is that we completely drawn all the motherboard wire by wire and bit by bit, every 0 or 1 on that motherboard has a reason and we leave nothing to chance. We take nothing for granted. But the question is:
why should we take this course?
By understanding the architecture of IBM PC 5150, we will be able to understand the BIOS code written in one of the ROMs on the motherboard, this BIOS is somehow the first operating system, the first program. Then we will rise through a path which would lead us to understanding the following in the most intuitive way which is by studying the source code:
BIOS
DOS operating system
Assembler
Compiler
80286 and 80386 processors
Understanding the first linux by reading its source code
Remember the best way to undestand anything is to study the source code, and to understand the soure code we need to learn the underlying hardware down to the most detailed and lowest level possible and thats what we have done in this course.