IC Design Process: A Beginner's Overview to VLSI Technology
- Be familiar with electronic circuits and the terms like transistor, logic gate & flip flop
This is a beginner level course.
When anybody start learning a hardware description language such as Systemverilog or VHDL, the most common problem they could face is, in ‘connecting’ what they write in their program to the actual ‘circuit’ that get produced in the Silicon. This is a course designed to simplify this problem by connecting together the pieces of information scattered throughout RTL design, functional verification, synthesis, physical design and manufacturing in VLSI technology.
This is not teaching any specific hardware description language, or anything related to coding in an HDL.
- Beginner Systemverilog/ Verilog/ VHDL learners. This course is not for experts who know end to end process in the SoC design.
- History of ICs04:01
- Digital Circuit Fundamentals -101:32
- Digital Circuit Fundamentals -202:03
- IC Design Process00:35
- Front End Design01:50
- Units & Clusters01:28
- Back End Design01:25
- Physical Design04:48
- IC Manufacturing Process00:47
- Building Transistors02:09
- Connecting Transistors03:00
- Learning SV04:57
- Design & Manufacturing Process Summary01:14
- Course Summary00:56
- Bonus Lecture00:33
Systemverilog Academy is established to teach the VLSI industry's most preferred Hardware Description langue for SoC design, 'the Systemverilog HDL'. This is a unique platform to learn SV for SoC Design and Functional Verification in any level. We offer you different courses from beginner to expert level for SoC desing and Verification in SV.