Simulating PWM Strategies for Power Converters with QSPICE

Explore pulse width modulation (PWM) for power converters, linking concepts from communications, compare duty ratio with sawtooth and sine/cosine with triangular waveforms, then model buck converter with QSPICE.

Explore PWM and modulation, showing how a low-frequency signal is mixed with a high-frequency carrier to provide gating signals for power converters, and relate to demodulation in power electronics.

Explore the fundamentals of power electronics, including switching strategies and PWM concepts for DC and AC converters, and learn how diodes, IGBTs, and MOSFETs enable voltage transformation and control.

Learn how pulse width modulation uses a carrier waveform and duty cycle to generate gate pulses for MOSFETs/IGBTs in power converters, enabling constant switching frequency and DC or AC outputs.

Explore buck converter topology and operation, applying PWM to convert unregulated input to a steady lower output via duty ratio, MOSFET switching, LC filter, freewheel diode, and q spice simulations.

Learn to simulate a buck converter with q spice by assembling a circuit using Vin, an n-channel MOSFET, an inductor, a diode, a capacitor, and a load, including parasitic resistances.

Learn to simulate a buck converter in qspice by creating a c++ pwm block, selecting mosfet and diode models, and driving the mosfet with duty versus a sawtooth carrier.

Learn to implement pwm for a buck converter in QSPICE by creating a sawtooth carrier, setting a duty ratio, and driving MOSFET gate with voltage source at 10 kHz.

Configure a nonlinear qspice buck converter simulation, set a 0.1 s stop time and 100 ns max step for 10 kHz pwm, and plot duty, carrier, and gate voltages.

Demonstrate how pulse width modulation of a buck converter uses a high-frequency carrier and duty ratio to produce a smooth DC via an LC low pass filter.

Conclude the PWM section by showing how gate pulses achieve a constant switching frequency while varying on and off times, enabling buck converter filtering to a low-ripple output.

Explore coordinating two controllable power devices in a half-bridge converter, applying pulse width modulation with proper constraints, and using the converter leg as a building block for flexible power converters.

Examine a modified buck-boost topology with two controllable devices S1 and S2, showing how switching and mode control achieve buck and boost operation, and how to simulate it.

Explore simulating a modified buck-boost converter in QSPICE by updating the C++ control block, adding G1 and G2 ports, and implementing a mode parameter for buck and boost operation.

Explore simulating a modified buck-boost converter in QSPICE, analyzing buck and boost operation through PWM control, gate pulses, and piecewise linear voltage sources to manage transients.

Examine bidirectional buck converter topology and operation enabling reverse power flow. Compare forward and reverse modes and the role of swapped diode and switch.

Explore the half bridge module, which integrates power devices, diodes, gate drivers, heatsinks, and protection circuits to enable a compact bidirectional buck converter leg.

Transform a buck converter into a bidirectional buck converter by adding a half-bridge, noting inbuilt reverse diodes, and preparing dual gate signals for PWM control in QSPICE.

Learn to simulate a bidirectional buck converter using a two-MOSFET half-bridge in QSPICE, with forward and reverse power-flow control, gate-signal generation, and duty-cycle modulation.

Explore bidirectional power flow in a half-bridge buck converter, switching M1 and M2 for forward operation and ramped PWM duty for reverse, revealing bridge voltage and currents.

Simulate a bidirectional buck-boost converter in QSPICE by expanding a half-bridge circuit, duplicating the HB module, labeling nets, and preparing a control block for buck and boost modes.

Explore how to simulate a bidirectional buck-boost converter with two half-bridge modules in QSPICE, using direction and mode controls to switch between forward/reverse and buck/boost operation.

Analyze bidirectional buck-boost converter results, focusing on forward buck operation with output below input and positive inductor current, and explore reverse boost mode.

Explore building a half-bridge dc-to-ac converter in QSPICE, using a capacitor bank, dc input, and sine-modulated pwm with a triangular carrier at 60 Hz.

Explore simulating a half-bridge dc-ac converter with qspice using a sinusoidal modulation signal and a triangular carrier, with complementary mosfets and dead time at 10 kHz switching.

Explore how pulse width modulation generates gating signals for multi-device power converters, from modified buck-boost and half-bridge modules to bidirectional and full-bridge topologies, emphasizing safe coordination to prevent short circuits.

Explore the full bridge converter made of two half-bridge modules with a common dc link, its pwm strategies, conduction states, and vector output mapping.

Explore the full bridge converter by analyzing two half-bridge modules, four switches with antiparallel diodes, and the four conduction states, including complementary gating and dead time.

Explore bipolar modulation, a simple PWM strategy for the full-bridge converter that produces plus or minus VDC, with one active leg driving current in AC circuits.

Simulate a full-bridge converter with bipolar PWM in QSpice, building a full-bridge module with two converter legs, four gate signals, and DC link inputs.

Design and simulate a full-bridge dc-to-ac inverter using bipolar pwm, generating gate pulses from modulation and carrier inputs, and analyze the output waveform and vout behavior.

Express the full-bridge output as a three-level vector and compare bipolar, unipolar, and phase-shift PWM, highlighting hardware implementation and space vector concepts.

simulate unipolar PWM for a full-bridge converter using QSPICE, switching from bipolar PWM and using a single zero-to-one carrier to produce zero, plus, or minus VDC.

Implement carrier waveforms in C for phase-shift PWM in a full-bridge converter, using global variables to preserve state and detect the PWM cycle start in simulation with QSPICE.

Introduce a phase shift between carrier wave one and two in a full-bridge pwm simulation, using a previous-phase tracker and phase-change calculation.

Apply phase-shift pwm to a full-bridge converter in qspice, generate phase-shifted gating pulses, measure bridge voltage and current, and observe zero average inductor current.

Conclude by showing how the full-bridge converter employs bipolar, unipolar, and phase shift PWM to realize all possible output voltages, guided by a switching table and operating states.

Explore the basics of a three-phase converter, its common topologies, and the space-vector pwm approach using vector output concepts and simulations in qspice.

Explore three-phase systems, including balanced versus unbalanced voltages, star and delta connections, and the distinction between line-to-line and phase voltages, with a focus on PWM strategies for three-phase converters.

Examine the topology of a basic three-phase converter with three half-bridge legs fed from a dc source, and identify the eight switching states under the leg constraint and diode conduction.

Express the three-phase converter output voltages at terminals A, B, and C relative to the negative dc bus and system neutral using KVL and the balanced phase sum zero.

Simulate a three-phase converter using simple sine-triangle PWM, building a three-phase module from a full-bridge, configuring six gate signals, and comparing with vector PWM.

Demonstrate three-phase sine-triangle pwm for a three-phase converter in qspice, adding neutral grounding, three modulation signals with a common carrier, and 120-degree phase shifts for balance.

Explore three-phase converter simulation using sine-triangle PWM, with independent modulation indices, gate signals, and system neutral referencing, while troubleshooting QSPICE time-step issues.

Represent the three-phase converter output as a rotating vector via Clark's transformation to alpha, beta, and zero components for pwm switching analysis.

Map the eight switching states of a three-phase converter into alpha-beta vectors using Clark's transformation, then plot these vectors to prepare for space vector pwm.

Apply space vector PWM theory to determine switching patterns from the reference output voltage using Clarke transformation to alpha and beta, and select between v1 to v6.

Determine the sector of the alpha-beta reference voltage for a three-phase converter in space vector pwm, using a sign-based search and vector pairs like v1v6, v6v2, v1v5, v5v3 in QSPICE.

Test and verify space vector pwm algorithm for a three-phase converter by confirming sector identification with v_r alpha and beta, using a lookup table to compute t1, t2, t0 times.

Code the converter output voltages as an eight-vector alpha-beta matrix for space vector pwm, determine sectors, and fetch vectors from a lookup table to calculate nonzero vector time intervals.

Learn to simulate a three-phase converter with space vector pwm using qspice, focusing on correct dc link handling, vector time intervals, and gating sequence generation.

Learn to run space vector PWM once per switching cycle by adding a control time instant and a 100 microsecond cadence, lifting vector state, and updating zero-vector and vector intervals.

This lecture details implementing space-vector pwm gating logic for a three-phase converter, including generating an eight-vector sequence and gating time intervals with symmetry considerations.

Simulate a three-phase converter with space vector PWM by implementing time-based gating using t execute and time intervals to apply zero, x, and y vectors.

Explains space vector PWM for a three-phase converter, generating v zero and v x vectors, gating upper and lower MOSFETs, and updating t_execute for switching.

Conclude this course by demystifying switching strategies for power converters and visualizing pwm methods with Q spice, then implement the control code in C and C++ for microcontrollers.