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Mastering of Arm Processor Architecture part 1
Rating: 4.0 out of 5(3 ratings)
37 students
Created bySohaib Dar
Last updated 6/2024
Arabic

What you'll learn

  • Understand the architecture of ARM Cortex-M Processors.
  • Understand the applications of ARM Processors.
  • Understand the different Architecture ISA of ARM Cortex-M.
  • Interpret the usage of different registers and bus interfaces in ARM Cortex-M.
  • Connect the Peripherals with AMBA.

Course content

9 sections17 lectures3h 30m total length
  • Content of course8:41

Requirements

  • Good knowledge with Computer organization and architecture
  • Have a good knowledge of Avr microcontroller
  • Familiar with Embedded C

Description

Hi all! Welcome to my course on "Mastering of ARM Processor Architecture part 1". This course will help you gain knowledge in the architecture, registers, features and applications of ARM Cortex Processors. The other half of the course will help you understand the different instruction set of different ARM Cortex-M profiles so that you'll be able to write programs in assembly language.


The Architecture part covers:

1. Features of ARM Processors.

2. CISC and RISC Processors.

3. Families of ARM Processor.

4. Architecture profile of ARM Cortex-M.

5. Dive deep into Cortex-M.

6. Difference between ARM and Thumb Instructions in Legacy ARM Processors.

7. Different stages pipeline of Cortex-M.

8. Registers - General Purpose, Special Purpose in ARM Cortex M4.

9. Core Peripherals of Processor.

10. Von-neumen and Harvard Architecture.

12. Bus Interfaces.

13. AMBA.

14. Berif about STM32 Categories.




What are you waiting for? I'll see you there in my course.

The Cortex-M3 and Cortex-M4 are processors designed by ARM. The Cortex-M3 processor was the first of the Cortex generation of processors, released by ARM in 2005 (silicon products released in 2006).

The Cortex-M4 processor was released in 2010 (released products also in 2010). The Cortex-M3 and Cortex-M4 processors use a 32-bit architecture. Internal registers in the register bank, the data path, and the bus interfaces are all 32 bits wide. The Instruction Set Architecture (ISA) in the Cortex-M processors is called the Thumb ISA and is based on Thumb-2 Technology which supports a mixture of 16-bit and 32-bit instructions.



Who this course is for:

  • Beginner Embedded SW Engineer