
Learn Xilinx system generator from scratch, from installation to building basic models. Explore sampling concepts and image processing and encryption projects using chaotic maps.
Learn to install Matlab from the official site, download, and activate it on Windows. The video guides product selection, licensing, and activation steps for setup.
Download the Vivado windows installer from the official site, sign in or create an account, and choose the standard version. Then run the MATLAB configurator to ensure compatibility with releases.
Learn the essentials of sampling: how continuous signals become discrete through regular sampling, the role of the sample period, and how analog-to-digital conversion yields binary samples for digital processing.
This lecture compares fixed-point and floating-point arithmetic in FPGA design, explains bits, binary point, and signed representations, and outlines trade-offs in accuracy, performance, and cost with examples and MATLAB verification.
Explore the Xilinx Blockset, mapping real-time signals with System Generator blocks, gateways, and feedback elements, and learn selecting quantization and interface parameters for FPGA implementations.
Learn to use the system generator block within MATLAB, explore its documentation and examples, and prepare FPGA implementations through design, simulation, and synthesis workflows.
Explore constant and gateway blocks in Xilinx System Generator, and compare fixed-point and floating-point representations, including quantization, rounding, truncation, overflow handling, and saturation.
Explore a practical sine wave demonstration in Xilinx System Generator, comparing Zheng's blocks with gateway blocks, and mastering sampling frequency, sample period, and discrete versus continuous output.
Learn to implement addition, subtraction, multiplication, and division using System Generator blocks, explore full precision versus user-defined precision, and tune latency and pipelining for FPGA performance.
Explore logical operations in Xilinx system generator using blocks, covering seven logical functions, including and, or, not, and inverter, with two to 1024 inputs, latency, and practical examples.
Learn to implement image processing with Xilinx system generator blocks, including image visualization, preprocessing, per-channel processing, and FPGA deployment with gateway blocks and frame-based streaming.
Explore image negative transformation and basic image processing techniques using Xilinx System Generator blocks, including pixel value mapping (0–255) and implementing minus one via constants and subtraction.
Apply image thresholding in Xilinx system generator by implementing relational blocks and multiplexers to set a threshold that separates white and black pixels. Explore global and entropy-based methods.
Explore image enhancement, a key image processing technique used to clarify x-ray images by boosting pixel values with a constant via system generator, including color channel considerations.
Implement an image encryption model using chaotic maps, simulated in Simulink and implemented on an FPGA via Xilinx System Generator, with fixed-point representation and NIST verification.
Examine the logistic map's chaos, its lambda parameter, and sensitive dependence on initial conditions, then implement image encryption and decryption using Xilinx System Generator and MATLAB models.
This lecture introduces the Lozi map, a two-state chaotic system with X and Y and parameters alpha and beta, explains its equations and chaos, and outlines a MATLAB image-processing implementation.
Implement the tent map in Xilinx System Generator using fixed-point MATLAB representations, compare three fundamental chaotic maps—including hybrid maps and gasket—and implement and evaluate an encryption system.
Integrate outputs from three fundamental maps to realize the xor map and generate a final output for decryption. Validate the design on MIT encryption model and verify the decrypted image.
Explore the cascade map architecture for chaotic encryption using the logistic map and two additional chaotic maps, forming a three-channel image encryption system.
This course will teach you "What is XSG and How to implement Simulink models using the tool".
Xilinx System Generator is an FPGA programming tool developed by Xilinx. It is specifically focused on Xilinx FPGAs, enabling the developers to work in Simulink environment and to generate parameterized cores particularly optimized for Xilinx FPGAs. It acts like an interface between Simulink and FPGA environments. Since the modern technology depends on FPGA platform, simpler techniques are implemented to design complicated architectures.
As an initial process, a model is developed in Simulink using XSG tool. The XSG environment in Simulink is that of processed inside FPGA. After the model is developed, code is generated by the tool. This creates netlist and IP cores which can be opened in Vivado. The code can be simulated and synthesized and dumped into FPGA kit. Commercial FPGA kits available are Spartan 3E, ZNYQ, Cyclone etc.
This course assumes that viewers has no prior knowledge and everything will be taught from scratch. In this you will learn the fundamentals of XSG tool and how to develop models in Simulink. I recommend you to have a basic knowledge on Digital Signal Processing. In this course you will learn:
Fundamentals of XSG
Implementation of some basic models using XSG and Simulink.
Implementation of complex models like Image processing techniques and so on.