Learn VHDL and FPGA Development

Name: Learn VHDL and FPGA Development
Rating: 4.5 (123 reviews)

Use VHDL to develop FPGA applications that run on development boards

Created byYour FPGA Guy Christman

Last updated 2/2024

English

English [Auto],

What you'll learn

Understand the VHDL design and development process
Learn how to implement designs using VHDL development tools
Become familiar with the various FPGA development tools available
Complete projects from conception to full implementation

Course content

15 sections • 99 lectures • 15h 0m total length

Welcome to the Course7:16
This lecture introduces the course and instructor to the students.
VHDL Introduction6:49
This lecture introduces VHDL and how it'll be used in this course.
Creating a Project in Vivado8:23
This lecture goes through the steps for creating a project in Vivado, which is a tool used to implement VHDL designs on a Xilinx FPGA.
Creating a Project in Quartus12:17
This lecture goes through the steps for creating a project in Quartus, which is a tool used to implement VHDL designs on a Intel FPGA.

VHDL Keywords9:59
This lectures covers the various keywords used in VHDL.
VHDL Libraries11:34
This lecture walks through several of the common VHDL libraries.
VHDL Entities & Architecture11:08
This lecture explains what the entity and architecture portions of the VHDL design are.
VHDL Generics10:54
This lecture discusses VHDL generics and how they are used.
VHDL Data Types17:45
This lecture describes the various data types used in the VHDL language.
Integers in VHDL3:40
This lecture discusses the specific VHDL data type integer.
When-Else Statements5:35
This lecture discusses how the when-else statement is used in a VHDL design.
Concurrent vs Sequential Statements7:39
This lecture discusses the difference between concurrent and sequential statements in VHDL.

Introduction to Simulation7:14
This lecture introduces the simulation section in this course.
Shift Register Design13:06
This lecture talks through a shift register design.
Shift Register Test Bench Design13:15
This lecture goes through the process for creating a test bench.
Shift Register TCL Script Design6:13
This lecture walks through the process of creating a TCL script for simulation.
ModelSim Introduction3:35
This lecture introduces the tool ModelSim, used to simulate VHDL designs.
Create a Project in ModelSim2:05
This lecture walks through the process of creating a project in ModelSim.
Running a Simulation in ModelSim5:51
This lecture walks through how to run a simulation in ModelSim, step by step.
ModelSim TCL Script Demonstration3:57
This lecture provides an example of creating a *.tcl script for use within ModelSim.
Navigating ModelSim Simulations14:55
This lecture explains how to navigate various portions of the ModelSim software.
Vivado Simulator Tool Introduction5:06
This lecture introduces the Vivado VHDL simulation tool.
Running a Simulation in Vivado5:48
This lecture walks through using the Vivado simulation tool.
Navigating Vivado Simulations16:40
This lecture shows how to navigate the Vivado simulations.

Introduction & Deliverables3:26
This lecture talks about what is required to complete this project.
Buttons & LEDs Complete Design Walkthrough4:22
This is the complete design walkthrough for the button led project.
Arty A7 IO Placement7:11
This lecture goes through what is required to place the IO on the Arty A7.
Generate a Xilinx Programming File9:19
This explains how to generate a Xilinx programming file.
Programming the Arty A7 Development Board4:10
This lecture explains how to program the Arty A7 development board.
Arty A7 Demonstration2:14
This is the demonstration of the completed project running on the Arty A7.
DE10 Nano IO Placement6:44
This lecture goes through the pin placement process for the DE10 Nano development board.
Generate Intel Programming File4:41
This lecture walks through the process for generating the Intel programming file.
Programming the DE10 Nano Development Board6:15
This lecture describes how to program the DE10 Nano Development board.
DE10 Nano Demonstration2:08
This is a demonstration of the completed project running on the DE10 Nano development board.

Signals and Constants15:09
Understand how signals and constants define VHDL designs, using constants for readable code and signals as internal wires, with examples from a two-bit comparator and a blinky LED project.
VHDL Processes9:37
This lecture discusses what a VHDL process is.
VHDL If Statements12:11
This lecture talks about how if statements are used and the specific syntax.
If Statement Priority Example7:33
This lecture explains how if statements can be used to implement prioritization.

Blinky LEDs Introduction & Deliverables3:51
Blinky LEDs Complete Design Walkthrough14:37
Walk through the complete Blinky LED VHDL design, explaining the entity and architecture, generics such as num LEDs and blink rate, and mapping to different boards.
Blinky LEDs Arty A7 IO Placement6:45
Blinky LEDs Arty A7 Demonstration3:11
Demonstrates a blinky led project on the Arty A7 development board using a counter that turns leds on at max value. Reset tied to switch zero stops and restarts blinking.
Blinky LEDs DE10 Nano IO Placement6:26
Learn to assign the DE-10 nano blinky LED I/O in Quartus Prime by importing a pinout CSV, mapping LED out 0–7, clock, and reset.
Blinky LEDs DE10 Nano Demonstration2:42
Watch the DE-10 Nano blinky LEDs demonstration as eight LEDs blink in unison at about two hertz when the slide switch is enabled, with the blink rate adjustable in code.

PWM Signals6:46
Explore pulse width modulation (PWM) and how varying the duty cycle controls LED brightness and RGB color, using VHDL to generate PWM signals for LEDs and servos.
PWM VHDL Design Part 116:51
Design a reusable pwm controller in VHDL by setting a generic clock frequency and a duty cycle port, and implement two counters to output a pwm signal at the frequency.
PWM VHDL Design Part 216:53
Explore finishing pwm vhdl design by defining architecture with max frequency count and pwm step, converting duty cycle to max pwm count, and driving pwm output to dim led.
VHDL Generate Statement12:19
Learn how the VHDL generate statement enables iterative and conditional elaboration of designs, using for loops and if statements to replicate components in a counter for an LED brightness project.
Counter Design Part 111:51
Counter Design Part 218:18
Design a parameterized VHDL counter with both synchronous and asynchronous resets and a generic max value. Simulate its behavior and prepare it for LED brightness project.
VHDL Component Instantiations Part 118:01
Learn how to instantiate VHDL components inside a top level design, map ports and generics, and use PWM and counter modules to drive an LED brightness project.
VHDL Component Instantiations Part 217:20

LED Brightness Introduction and Deliverables4:35
Learn to vary led brightness with pulse width modulation and a counter in VHDL, creating a led brightness design for four standard and rgb leds on Altera and Xilinx boards.
LED Brightness Complete Design Walkthrough15:33
LED Brightness Arty A7 IO Placement6:01
Configure the rda seven io for led brightness by mapping rgb and standard leds, enabling rgb and led via switches, and defining a 100 mhz clock.
LED Brightness Arty A7 Demonstration3:44
Explore how VHDL and FPGA design use PWM and duty cycle to vary LED brightness on the RDA seven development board, with regular and RGB LEDs, counters, and component instantiations.
LED Brightness DE10 Nano IO Placement5:43
Map the led brightness project to the de-10 nano board by selecting led out, clock, and enable pins and configuring 3.3v lvttl io standards via Quartus assignments.
LED Brightness DE10 Nano Demonstration2:56
Explore pwm-based led brightness control on the DE-10 Nano board, using a counter to modulate duty cycle across eight LEDs with a slide-switch enable, at 50 Hz.

UART Explained18:55
Explore universal asynchronous receiver transmitter (uart) in depth, including its full duplex operation, start and stop bits, parity, and ASCII data transmission with an FPGA and a computer.
UART Simulation7:19
Explore a UART simulation in VHDL with Vivado, showing ASCII data at 115200 baud and the start, data, parity, and stop bits with RX data out and data valid signals.
MicroBlaze Softcore Processor12:13
Learn how the Xilinx microblaze soft core processor is defined and instantiated in vivado, configure a uart demo on the rdi a7 development board, and manage memory and resources.
Xilinx Software Development Kit (SDK) Part 113:30
Learn how to use the Xilinx software development kit with the Microblaze soft core, build a UART top-level VHDL design, synthesize, implement, and export hardware to SDK.
Xilinx Software Development Kit (SDK) Part 215:28
Export hardware for software development and launch the Xilinx SDK, then create a hello world c project for the Microblaze, build, and associate the elf for uart testing.
Nios II Softcore Processor7:09
Learn how the Nios II soft core processor enables multiple processors on a single FPGA, connect peripherals via Avalon or parallel interfaces, and generate drivers to program the device.
Nios II Softcore Processor Implementation30:11
Nios II Software Build Tools Part 110:19
Explore the Nios II software build tools, an eclipse-based IDE for Altera devices, to create a hello world UART project using the BSP.
Nios II Software Build Tools Part 25:06
Learn to extend a hello world project using the Nios II software build tools part 2, implementing a uart demo with a ten-iteration hello world loop, newline, delay, and build.

UART Demonstration Introduction & Deliverables3:57
UART Demonstration Complete Design Walkthrough Xilinx5:07
Follow a complete uart demonstration design on a Xilinx fpga using a Microblaze soft processor, wrapper integration, and elf-based firmware to print hello world to a uart terminal.
UART Demonstration Arty A7 IO Placement4:36
Demonstrates UART IO placement on the Arty A7 board, detailing input clock, reset, switches, LEDs, and buttons, and mapping UART TX/RX in the master zdc file.
UART Demonstration Arty A7 Demonstration6:01
Demonstrate UART communication on the Arty A7 by using the hardware manager and Teratum to load a bitstream and print hello world from the MicroBlaze.
UART Demonstration Complete Design Walkthrough Altera5:37
Walk through the UART demonstration project for the Altera DE-10 Nano development board. Follow the flow from UART demo to Platform Designer and Nios II software.
UART Demonstration DE10 Nano IO Placement5:13
Map clock to pin v11 and reset to pin y24 on de-10 nano board, use 3.3v i/o standard, then import uart demo pin out csv in Quartus Prime and compile.
Programming Nios II Softcore Processor10:24
Program the Nios II soft core on the Altera De-10 Nano board using JTAG and the Quartus programmer, then deploy hello world from the Nios II software tool.
UART Demonstration DE10 Nano2:31

Requirements

Basic knowledge of digital electronics such as logic gates
No VHDL experience required, this will be covered in the course
Desire to learn about VHDL and/or FPGA's

Description

Learn the Essentials of VHDL and FPGA Development is course that will teach you the fundamentals and basics of VHDL design. Prior to working through the courses you will go through the VHDL design structure section that will explain the various concepts and terms needed to implement the projects in VHDL. In this course you will be working through various projects that will require you to go through the entire FPGA development process. You will be guided through the coding of the actual VHDL to the synthesis using either Xilinx’s development tool, Vivado or Altera/Intel's development tool Quartus. The projects in this course:

Shift Register Design
1. A project that takes you through the design and simulation steps to fully test and implement a shift register.
Buttons & LEDs
1. A project that is designed to teach students the very basics of VHDL as well as how to make specific pins on an FPGA inputs (buttons) and outputs (LEDs).

All of the required background and knowledge to complete each project will be explained prior to completing the projects above. There are demonstration videos and walkthroughs for each project so that you can have a deep understanding of how the project works. Walkthroughs of the completed projects are also included to further your understanding of how these designs are implemented.

Who this course is for:

Makers and hobbyists who want to learn how to use FPGA's
Anyone interested in learning how to create VHDL designs
Engineers who want to learn or build upon their FPGA development skills

Learn VHDL and FPGA Development

What you'll learn

Explore related topics

Course content

Introduction4 lectures • 35min

VHDL Design and Data Types8 lectures • 1hr 18min

VHDL Simulation12 lectures • 1hr 38min

Buttons & LED Project10 lectures • 51min

VHDL Design Concepts4 lectures • 45min

Blinky LED Project6 lectures • 38min

Pulse Width Modulation8 lectures • 1hr 58min

LED Brightness Project6 lectures • 39min

UART & Softcore Processors9 lectures • 2hr

UART Demonstration Project8 lectures • 43min

Requirements

Description

Who this course is for: