
Explore how to automate building embedded C projects with GNU Make and Makefile, detailing compilation stages, object files, linking, and generating the final binary at scale.
Introduce the makefile as a standalone build tool with its own keywords, options, and syntax, and discuss whether it uses a dedicated language to help you write your first makefile.
Explore makefile rules, targets, and dependencies to orchestrate builds, including linking object files to form Elf. Learn how commands execute in order, resolve dependencies, and create rules for dependent steps.
Explore makefile rules, targeting all as the entry point, with dependencies from main.c to main.o and image dot elf, and a linking command that builds the elf.
Explore three makefile rules, including the all entry point and a build rule, and learn how dependencies connect main.o to the image elf, with emphasis on proper output targets.
Master makefile magic variables to reference inputs, dependencies, and target outputs with $@, $<, and $^ in Makefile rules; explore pattern rules and path handling to automate embedded c builds efficiently.
Explore makefile conditions to control building across toolchains, using if equal to select gcc versus other linkers. Tailor flags, libraries, and outputs such as elf binaries for different toolchains.
Learn makefile pattern substitution that renames extensions like dot c to dot o, substitutes file paths such as src to lib, and builds file lists using the wildcard keyword.
Explore makefile command prefixes in GNU make, including minus, add, and plus, to control errors, silent mode, and explicit execution in embedded C projects.
Use strip to remove leading and trailing whitespace in makefile lists, then apply filter or filter out to keep or discard files by extension, such as .list.
Break makefiles into multiple small dot makefiles or .mk files to avoid spaghetti code, improve readability, and assemble rmc within the makefile by structuring dependencies and using include or -include.
Explore makefile options like environment override (-e), force rebuilds (-p/--always-make), silent mode (-s/--silent), and parallel builds (-j/--jobs) to speed embedded C projects and spot dependency issues.
Learn how to use the makefile phony keyword to declare non-file targets, resolve dependencies, and structure entry and exit points like all and clean for reliable builds.
Learn how makefiles act as a build tool with rules and dependencies to assemble embedded c projects, and how build system back ends generate tool based files from input descriptors.
Explore the major makefile features for embedded C: incremental builds, recursive make, environment variable import, parallelism with jobs, and low-level control over rules and dependencies.
Use makefile parallelism to run independent rules in parallel, guided by --jobs and hardware resources. Design the dependency tree to maximize concurrency, organizing tests into independent rules for faster builds.
Explore recursive makefiles by organizing modules with a top level makefile and module makefiles such as m1.mk and m2.mk, triggering builds through a phony entry point and weighing dependency challenges.
Learn how to use makefile inclusion to modularize an embedded C project, including top level makefile and module mk files, improving readability and a structured build system.
Explore how a makefile serves as a build tool within a broader build system, outlining top-level makefile and sub makefile structures, dependency handling, and descriptor-driven configuration for embedded C projects.
Use the makefile build tool and a tools package (cygwin or mingw on windows, or linux with embedded tools). Structure a top level makefile with modular rmc files, avoiding recursion.
Identify and install the GNU Win32 make package and Cygwin 64-bit, then install the ARM GCC toolchain for Cortex-M, and create a tools directory to organize these installations.
Download and install the ARM GCC toolchain from the new ARM link, select the installation directory, and verify the setup, then configure environment variables for the first makefile project.
Set up windows environment variables by updating the path to include the gnuwin32 bin directory so make and related tools are recognized from the command line.
Structure an embedded C project with src for sources, NC for headers, a common area, and a drivers folder for low-level peripherals, then use a makefile as the entry point.
This lesson shows organizing a makefile project with a clean source structure: main.c, user headers and macros, power/speed/award drivers, power.c, helpers.c, enabling clear makefile rules and dependencies.
Demonstrates building an embedded C project by adding a first dummy main.c and headers, using include folders and standard C headers to feed makefile rules.
Design a makefile structure for an embedded c project by defining inputs and outputs, listing sources and headers, and using a toolchain to build the elf.
Define makefile variables to point to cygwin tools and the arm gcc toolchain, configure cc, asm, and ld, and enable preprocessing of OS files with gcc.
Learn to organize an embedded C project by creating makefile variables and using wildcard expansion to list all C sources from src, common, and drivers directories for the build.
Write makefile rules to compile sources into object files and link them to form the final elf. Manage build path, object lists (common, source, driver, spi, power management), and mkdir.
Run and debug a makefile from the command line, identify linking errors due to missing objects, and fix object list syntax. Create a debug rule, correct substitution, clean and rebuild.
Explore incremental builds with a makefile, detecting changes by timestamp to trigger compilation and linking, and see that unchanged files yield no rebuild while the program dot elf updates.
Learn how parallel builds in a makefile speed up large projects by creating multiple processes across CPUs, triggered by make with the minus g option and validated through benchmarks.
Refactor makefile rules into a reusable template with a macro define named driver_rule, defined in support.mk, using double dollars and iterating over component drivers such as peripherals.
The makefile project we developed within this course is attached as a zip format in this session
Do you need to automate the build procedure of your project? Do you want to know what is going on behind the fancy user interface IDEs (like Eclipse ...) and how it build your project? Do you need to have better control over the compilation procedures of your embedded c sources?, then the Make and MakeFile is the answer for all those questions and concerns.
Make is a build tool allowing the automation of the build procedure of your project at larger scale, make used widely for embedded C projects (C sources) as well as C++ projects.
What are you going to get from this course?
This course will help you to:
Make your first steps with makefile syntaxes, keywords and concepts.
Learn how to deploy make tool as part of build System Architecture
Understand the mapping between your projects sources and makefile rules/list of dependencies
Create your first embedded system structure
Write your first makefile for this project: rules, functions, variables ...
Identify the dependencies to external environment in term of required packages and tools (cygwin, mingw, toolchain ...)
Execute your makefile to build your project
Identify issues within makefile used syntaxes, then fix them to get a working makefile build procedure
It is not only about make as build tool, it is about building full ecosystem on larger scale for your make based build system.