FPGA101: Digital System Design using Verilog and Python

Name: FPGA101: Digital System Design using Verilog and Python
Rating: 4.6 (13 reviews)

From Verilog basics to building a miniature of Google's TPU

Created byErwin Ouyang

Last updated 9/2025

English

What you'll learn

Understand the fundamentals of Verilog and FPGA.
Understand RTL design, including combinational logic, sequential logic, FSM, and FSMD.
Interface the digital circuit on the FPGA to an ARM processor.
Build a miniature Google's TPU.

Course content

8 sections • 25 lectures • 2h 49m total length

Introduction4:26
In this lecture, you are going to learn about how a chip is designed in brief and about the FPGA board for this course.
Source Code0:05

Verilog I6:12
In this lecture, you are going to learn about the basics of Verilog, and how to create a Verilog module and testbench.
FPGA Chip5:36
In this lecture, you are going to learn about the FPGA architecture, design flow, and design considerations.
Vivado Installation2:15
In this lecture, you are going to learn how to download and install Vivado software as well as the board library.
Simulation Flow3:11
In this lecture, you are going to learn how to use the Xilinx Vivado tools to simulate the "Hello World" module, in this case a 2-bit adder.
Compilation Flow5:54
In this lecture, you are going to learn how to compile the 2-bit adder and test it on the FPGA board.

Verilog III7:38
In this lecture, you are going to learn Verilog examples, guidelines, and common errors for synthesizable Verilog.
Sequential Circuits Modeling I5:11
In this lecture, you are going to learn the basics of synchronous systems.
Sequential Circuits Modeling II6:39
In this lecture, you are going to learn to model sequential circuits using Verilog.
Sequential Circuits Testing7:25
In this lecture, you are going to learn how to compile the counter module and test it on the FPGA board.

Neural Network Architecture8:06
In this lecture, you are going to learn about the basics of neural networks, a simple study case, and how it can be mapped into a matrix multiplication.
RTL Design of Systolic Processor13:23
In this lecture, you are going to learn how to design a systolic matrix multiplication processor, a neural network accelerator core, and an AXIS wrapper module for the neural network core.
SoC and Software Design8:55
In this lecture, you are going to learn how to integrate, test, and evaluate the RTL design with the SoC and software (Python).
Web Design0:04
In this lecture, you are going to learn how to create an embedded web application that consists of both a frontend and a backend.

Requirements

Fundamentals of digital circuits and programming will give an added advantage.

Description

Updates:

2025/09/05: Added embedded web application example.

FPGAs are often used to implement digital signal processing applications that require computation acceleration. FPGAs are also used to verify digital circuits before taping them out into silicon chips, called application-specific integrated circuits (ASICs). The Verilog/VHDL hardware description language (HDL) is used to describe the digital circuits, both for FPGA and ASIC targets. This course focuses on the Verilog language.

This course teaches the fundamentals of building digital circuits with Verilog. Four topics of fundamental digital circuits are explained: combinational logic, sequential logic, finite state machines (FSM), and finite state machines with data paths (FSMD). Three more topics about integrating the digital circuit on the FPGA into an ARM processor are explained. At the end of the course, a final project on how to build a miniature Google TPU is explained.

In the final project, you are going to learn the methodology design of an accelerator for a neural network based on a matrix multiplication core. Matrix multiplication is used in engineering for many applications. Once you get familiar with the methodology, then you should be able to apply the methodology design to any design that you want.

After finishing the course, you will receive a certified certificate of completion. A complete Udemy 30-day money-back guarantee if you are not satisfied with this course, allowing you to study with no risk.

See you within the course.

Who this course is for:

Anyone interested in learning the fundamentals of digital system design.

FPGA101: Digital System Design using Verilog and Python

What you'll learn

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Course content

Introduction2 lectures • 5min

Design Flow5 lectures • 23min

Combinational Circuits3 lectures • 21min

Sequential Circuits4 lectures • 27min

State Machine Circuits3 lectures • 22min

Zynq Architecture2 lectures • 13min

Basic Hardware Software Design2 lectures • 29min

A Miniature Google's TPU4 lectures • 30min

Requirements

Description

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