FPGA VHDL course coding QSPI nor flash memory

Name: FPGA VHDL course coding QSPI nor flash memory
Rating: 4.4 (62 reviews)

Learn how to Read/Write and work with QSPI Flash Memory with FPGA using VHDL code & Simulate with Modelsim from scratch!

Created byOfer Keren

Last updated 9/2022

English

English [Auto],

What you'll learn

Nor Flash Memory fundamentals
Designing a VHDL project from scratch! after this course you will be able to design by yourself any project
Writing VHDL code for working with the Nor Flash Memory
How to Read/Write micron Nor Flash Memory
How to Setup new flash memory, Setup its Inner Registers
How to write a simulation for Micron Nor Flash Memory Verilog part and simulate it
Everything you need to know about Micron Nor Flash Memory
How to approach to any Flash Memory of any type and product in the market
How to work with the Nor Flash Memory at different modes: SPI, Dual SPI, Quad SPI

Course content

4 sections • 36 lectures • 15h 8m total length

Introduction6:43
Explore how to implement QSPI nor flash memory in FPGA using VHDL and Verilog, cover SPI basics, datasheets, timing, test benches, and building a complete architecture.
Nor flash memory Vs Nand flash memory4:35
SPI Protocol and our Flash8:14
Master the spi protocol, a clocked, full-duplex serial interface with MOSI, MISO and chip select for multiple devices. Understand clocking, timing, modes, and data flow with espiner flash.
Download the QSPI component Verilog model4:58
Download the nor flash simulation model from Micron, locate the 128 megabit part, and download the data sheet and simulation models, then adapt a 25xxx Verilog model.
Our QSPI Nor flash memory PDF datasheet explained32:33
QSPI nor flash communication timing30:41
Learn the QSPI nor flash memory communication timing, including chip select control, SDR timing, and serial input/output sequencing, with emphasis on setup and hold times for reliable read/write.

VHDL Code Plan - Must watch to understand the rest!40:02
Writing the top entity and the Testbench Part125:19
Write the Registers File Component37:49
Writing the controller for the QSPI PART122:46
Write the qspi controller for a spy flash memory by wiring the register file and defining signals like chip select, clock, and reset.
Write the Read Data Process15:48
Develop the 32-bit read data process in the spi/qspi controller, handling dummy cycles and sampling on the rising edge to assemble data with four-bit rotations.
Writing the Write enable to the global clock19:18
Write the Send Quad command Process22:44
Develop the send quad command process, creating signals and a counter to sample command data and push a one-byte quad command into the dequeue path within the command state machine.
Write the Send Quad Address Process13:07
Write the Send Quad Data Process9:06
This lecture demonstrates coding the send quad data process for QSPI nor flash memory in VHDL, incorporating initiate data, address counter, and 32-bit data transfer.
Write the Send NonVolatile Data Process10:17
Master the write non-volatile data process for qspi nor flash memory in fpga vhdl, including 16-bit data, 32-bit address, and a four-cycle quad data write.
Write the Main State Machine41:00
Learn to configure the main state machine for a QSPI flash memory controller, integrate the initialization state machine, synchronize register reads, and manage command sequencing from initialization to data writes.
Write the Initialization State Machine45:35
Create and wire the initialization state machine to drive flash setup, including a wait counter, data counter, and sending the 0x06 command with dummy cycles, integrated with main state machine.
Write the Read status register state machine33:54
Write the Fast Read state machine31:09
Learn to implement the fast read state machine for a QSPI memory, including status register read, dummy cycles, address handling, and reading data into the register.
Write the Data to the QSPI state machine24:39
Learn to write data to a QSPI state machine by shaping command, address, and data flows, with quad command and data phases, dummy cycles, counters, and chip-select timing.
Write 16 bits command state machine9:03
Develop a 16-bit command state machine to write the nonvolatile register in a qspi nor flash memory, including initiating the command and sending the 16-bit data.
Write 8 bits command state machine14:18
Write the Sector Erase state machine10:30
Connecting the QSPI controller and the register file to the top entity20:42

Adding the QSPI flash memory Verilog component to the test bench27:44
Open the project files in Modelsim and fixing syntax errors16:18
Simulate the project and fix the clocks and initialization1:09:02
Writing the Testbench and test the Read status register59:43
Writing the Testbench and test the Write data to the QSPI1:05:10
Develop and simulate a qspi write sequence in a test bench, issuing commands, addresses, and data to a nor flash memory while monitoring the status register and write enable signals.
Writing the Testbench and test the Fast read40:47
Writing the Testbench and test the Write 16 bits42:26
Writing the Testbench and test the Write 8 bits27:11
Writing the Testbench and test the Sector erase19:41
Develop and test the sector erase in a QSPI flash memory using a testbench, validating sector and subsector erase commands, addresses, and status register busy signaling.
Final files for this Course and Conclusions!3:51

Requirements

VHDL Knowledge
PC with internet connection
Modelsim simulation tool - (not a must for learning... :)

Description

Do you want to learn how to write a VHDL code for communicating with Flash memory with a Quad SPI protocol?

Also I will teach you about the Flash memory Storage, As an electronic engineer specialized with FPGAs I will go with you step by step from the design of the code to the memory to a real working code that really runs, we will use a special component from Micron site that demonstrate a real flash memory and we will connect it to the code to check it under simulations!

Join my VHDL course to start learning!

Students saying:

Hassan Rabbani: "Good Course. Highly recommended"

Aleksander Bosko: "I have knowledge in VHDL, I think that you need some knowledge as the instructor wrote. This is a Very good course for learning how to use Flash memory. I tried to find this for long time, thanks for making the impossible possible!!!"

Today, every FPGA needs to load from Flash memory. the Flash load the FPGA in every reset of the board/development board.

The other uses of flash memories is of course to storage your data, this will happen from the FPGA itself by writing a code that controls the flash memory or a CPU that can communicate the flash memory.

Every company that hire FPGAs engineer will be more than happy to have this knowledge of using Flash memories.

In this course, Which is actually the only course/Video or article that explains how to use the Flash memory from zero within the hole internet(and you can check this...), I will teach you everything you need to know in order to work with the Flash memory. After this course you will become a master for Flash memory.

Because of the complex of the using of flash memory and the SPI protocol with quad data, there is no even one source you will find- search google and see by yourself.

The VHDL course is long so I will cover all of the issues and timing problems within this course.

We will write the full VHDL code to work with the flash memory we will also edit and improve the code in the simulation. On the end of this VHDL course you will have a full working code(which you can download or write through the lectures with me and compare to my code).

Here is a list of just a brief overview of what you will learn:

Nor flash vs Nand flash - why do we need nor flash for fpga load?(why not nand flash?)
Timing issues of the Flash memories and how to handle them within the code(explained with the PDF datasheet)
How to configure the flash memory inner registers
How to write data to the flash memory in single mode
How to write data to the flash memory in quad mode
How to read data from the flash memory
How to erase the flash memory
Flash memory frequencies explanation
Flash memory - memory table and memory partitions is explained
How to connect Micron Memory Flash Verilog module to our VHDL code
Simulate in Modelsim the Micron flash memory - This flash memory module represent a real module with the real timing issues, voltages and all of its configurations including resetting and everything...
The flash memory works with SPI protocol so the VHDL code covers that too
etc.....

This VHDL Course was made for all levels by a professional electronic and computer engineer. with a huge experience with FPGAs of all of the companies in the market and Board designing. Working with many different Flash Memories.

After finishing this VHDL course I can guarantee you will be able to take any other Flash Memory(Nand,Nor etc..) of any manufacturer and understand it and even write down your VHDL code for it.
This VHDL course comes with a 30 day money back guarantee! If you are not satisfied in any way, you'll get your money back.
So what are you waiting for? Learn FPGA Development in a way that will advance your career and increase your knowledge, all in a fun and practical way!

Who this course is for:

Anyone who wants to know how to use FLASH Memory from Scratch
Anyone who wish to become a better VHDL developer

FPGA VHDL course coding QSPI nor flash memory

What you'll learn

Explore related topics

Course content

Introduction6 lectures • 1hr 28min

VHDL coding19 lectures • 7hr 27min

Simulating the full project10 lectures • 6hr 12min

Extra1 lecture • 2min

Requirements

Description

Who this course is for: