What you'll learn
- FPGA drive UART
Requirements
- Verilog basic knowledge
Description
This course will focus on how FPGA drive UART communication. It will finish one task: send data from computer to FPGA through one USB-to-UART cable, after the FPGA receive the data, it will send the data back and show the data on the computer software. It includes the key knowledge as following:
(1) Edge detection;
(2) UART protocol analysis;
(3) UART protocol code in verilog;
(4) UART protocol simulation in Modelsim;
(5) FPGA drive UART system analysis and coding;
(6) Virtual Device coding and simulation skill;
Who this course is for:
- People who are interested in FPGA
Instructor
Work in embedded system development nearly 15 years;
Proficient in embedded software development by using C, C++, Verilog, familiar with operation system like Linux, Android, OpenWRT, Contiki, best at ARM/FPGA firmware and low level driver software development.
Proficient in embedded hardware design, multi-layer PCB layout, and signal-integrity simulation, master orCAD capture, Allegro, PADS, Hyperlynx; finished hardware system development in ARM, FPGA etc.