
Drive the LCD from the FPGA via SPI, wiring 3.3V power, ground, and the FPC connector to display RGB colors and text as the system target.
Analyze the system architecture of an FPGA-driven SPI TFT LCD, detailing the LCD reset, SPI drive, and LCD driver modules and how reset, cs, data/command, and clock signals control LCD.
The lecture analyzes lcd_rst reset timing for st7735s spi tft lcd, detailing the 10 μs pulse and 5 ms and 120 ms reset cancel windows, plus a 1 ms waveform.
Explore the lcd_rst module for the FPGA Drive SPI LCD, implementing a three-state reset sequence with 1 ms and 120 ms delays, using a 50 MHz clock and state-driven tasks.
Simulate lcd rst module 03 for fpga driver spi lcd, focusing on timing and code changes to maintain reset during transitions. Verify with ModelSim test bench and five-clock reset timing.
Explain the 4-line spi serial interface for the fpga drive lcd, covering cs control, data/command at the last clock, highest-bit-first data, and write and read timings.
Learn to code an spi driver module for an fpga-driven spi tft lcd, covering the module interface, clock divider, and the write byte workflow with cs, dc, and data sequencing.
Demonstrates setting up a ModelSim test bench for the SPI driver module of an FPGA TFT LCD, including clock, reset, enable, and test data.
Explore the lcd driver module 01 for fpga drive spi lcd, implementing lcd reset, lcd initial function via the spi driver, rgb display, and display picture through a state machine.
Explore the lcd_rst_task state machine, detailing idle and reset tasks, initializing parameters, controlling the lcd reset module, and handling the done signal with flow_ctrl.
Explore the lcd_init_task of the lcd driver module, detailing the register initial array output, SPI driver handshakes, flow control, delay handling, and transition to disp_rgb after sending 72 data.
Demonstrates displaying rgb colors on the lcd by setting x y coordinates and writing color data via spi using lcd_set_xy_task and set_color_task.
Display pictures with lcd_disp_pic_task by setting coordinates and size, using a text-file backed picture array; transfer 16-bit data via SPI in two 8-bit steps, then idle after a three-second show.
Explore using the Bmp2Hex tool to convert 24-bit bmp images into 16-bit rgb565 hex text arrays for LCD driver module 06, including file prep and saving for Quartus projects.
Linking LCD reset, SPI driver, and LCD driver modules in the LCD top module to control and initialize the LCD, display RGB colors, and render a picture.
Create a quartus project for the fpga drive spi tft lcd, run analysis and synthesis, configure pins with pin planner, and program the board to test.
This course will focus on how FPGA drive one SPI TFT LCD. It includes:
(1) SPI protocol analysis;
(2) SPI protocol code in verilog;
(3) SPI protocol simulation in Modelsim;
(4) FPGA drive SPI TFT LCD system analysis and coding;
(5) SPI TFT LCD driver analysis;
(6) BMP large data generate and storage for FPGA;
(7) FPGA task application;