Embedded System Design with Microblaze and Vitis IDE
What you'll learn
- Embedded System Design flow with Xilinx Vitis 2020.2
- Designing Embedded System using Microblaze Soft Processor
- Development of C applications for Microblaze Devices
- Software and Hardware Debugging
- Handling Interrupts in Microblaze based designs
- Understanding Xilinx Drivers
- Understanding of Digital Electronics
- Fundamentals of Computer Architecture
A faster Reconfigurable system makes FPGA a prominent choice for a large set of applications, but Hardware alone is incomplete without smart software synchronizing all the events fruitfully to achieve the desired Application. This course covers fundamentals of Popular Xilinx drivers viz. UART, AXI Timers, UART16550, AXI GPIO, AXI BRAM, etc. The course also illustrates the usage of the AXI interrupt controller for handling Interrupts. Also to felicitate incorporation of Hardware accelerators with Microblaze based design few examples on building Custom AXI Peripherals are also included. Software and Hardware Debugging, Profiling fundamentals are demonstrated with Microblaze to felicitate performance measurement.
The Microblaze is an FPGA-based Soft Processor capable of executing single instruction per cycle with few exceptions. The MicroBlaze interconnect is reconfigurable capable of communicating with a large set of peripherals to fit most of the medium-scale applications. It allows configuration of cache size, pipeline depth, peripherals, memory management unit, and bus interface suitable to fit different application requirements. As systems complexities are growing day by day, Microblaze will play central role in the non-Zynq based FPGA families whereas it will be the best light-weight alternative working in tandem with the Zynq hard processor for Zynq and Ultrascale based FPGA families.
Who this course is for:
- Anyone wish to build expertise in Xilinx Microblaze Devices with Xilinx Vivado and Vitis IDE
- Embedded System Design with FPGA Soft Processors
I currently serve as an instructor, where my responsibilities involve creating educational content for both undergraduate and postgraduate students. This content is designed to help them grasp the latest trends in VLSI (Very-Large-Scale Integration) technology. Prior to this role, I held the position of FPGA Developer Lead at one of India's premier Financial Technology companies. There, I led a team in the development of a cutting-edge High-Frequency Trading platform, leveraging Xilinx Alveo FPGA Cards.
Before my venture into the fintech industry, I dedicated three years as a VLSI Trainer at Mumbai University, India. Additionally, I spent one year as a Research Scientist at a renowned R&D center focused on Applied Electronic Research in India. During this time, I made significant contributions to projects such as the development of a Gradient Controller and a 64 MHz Receiver on FPGA for an indigenous MRI machine.
In my leisure hours, I have a passion for creating Udemy courses, and I have also collaborated with organizations like Larsen & Toubro Technology Services and Power International. In these collaborations, I played a pivotal role in designing various FPGA-based systems, including Simultaneous DAQ, Multi-channel Logic Analyzers, and DTS (Data Transmission Systems). My primary areas of expertise and interest revolve around Front End VLSI Design, System-on-Chip (SoC) development, and Chip Verification.