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Computer Architecture and MIPS Assembly Language Programming

Name: Computer Architecture and MIPS Assembly Language Programming
Rating: 4.2 (75 reviews)

with Tens of Solved Examples and Assignments with solutions, lecture notes, Exam samples with solution, and tutorials.

Created byDr. Shahram Taheri

Last updated 1/2026

English

English [Auto],

What you'll learn

MIPS Instruction Set Architecture
MIPS Assembly Programming - Theory and Practice with tens of examples
RISC ISA Architectures
Single Cycle and Multi-Cycle Processor Design
Arithmetic and Logic Unit (ALU) Design
Design the Control Unit of a Real Processor
Convert MIPS Assembly Instructions into Machine Codes
Understand Computer internal parts such as ALU, Datapath and control Unit
Understand CPU (Central Process Unit) and how it works

Course content

15 sections • 156 lectures • 30h 33m total length

Convert Uppercase to Lowercase and Vice versa12:27
Write a program that asks the user to enter an alphabetic character (either lower or upper case) and change the case of the character from lower to upper and from upper to lower and display it.
Nested Loops Example7:17
Implement a MIPS assembly program that reads n, sums numbers from 1 to n, prints the result, and repeats until a non-positive input is entered.
Display the Number of 1s in Binary Representation of an Input Integer6:15

Introduction to MIPS Assembly Programming10:31
Memory Operand: Load Word & Store Word in MIPS Assembly Language11:24
Demonstrate how MIPS loads and stores 32-bit words using lw and sw, explains big-endian memory layout, word alignment, and calculating A[i] with base address plus offset.
Immediate Addressing Mode & Signed/ Unsigned data in MIPS Assembly Language17:41
Explore immediate addressing in MIPS, using constants in addi, and the $zero register for moves, while mastering unsigned and two's complement data with sign extension.
MIPS Instructions Operands - Detailed Explanation - Uploaded Feb 8,202421:14
Explore how MIPS instructions translate to 32-bit machine code, detailing op codes, function codes, and operands, including immediate, register, memory addressing, load/store, and sign or zero extension.
ADD, ADDI, ADDU, ADDIU, SUB, LW and SW Instructions in MIPS15:48
Explains translating high-level code into MIPS assembly and machine code, covers add, addi, addu, addiu, sub, lw, sw, and the four basic instruction components: mnemonic, operands, destination, and optional label.
MIPS Arithmetic Instructions- Detailed Explanation - Uploaded Feb 13,202449:11
Explore MIPS arithmetic and logical operations, two forms: three-register instructions and two registers plus a 16-bit immediate. Learn 32 registers, immediate addressing, hi/lo usage for multiply and divide, overflow.
MIPS Logical Instructions33:12
MIPS Bitwise Instructions, Detailed Explanation with Several Example, Feb 8-202443:41
Explore MIPS bitwise instructions like and, or, nor, xor and their immediate variants, plus shifts, ones and two's complements, and displacement based addressing for load and store.
Branches and Jump Instruction in MIPS Assembly Language + how to read array[i]15:47
Discover how to access C[i] in MIPS by computing 4*i, adding to the base address, and loading or storing the value. Explore branch and jump instructions and memory alignment.
Loop Structure in MIPS Assembly Language13:29
Learn how high-level for and while loops map to MIPS assembly, with initialization, condition checks, and index updates, using jumps, branches, and set less than with the zero register.
The Other Comparison Instruction + Logical Instructions in MIPS14:39
Explore signed and unsigned comparisons in MIPS, including set less than and set less than immediate, and how results drive branches, jumps, and load immediate operations.
MIPS Alignment Restrictions: .align, .byte .half and .word Assembler's directive11:50
Explore how MIPS memory stores data with alignment restrictions for .byte, .half, and .word, using .align directives, little-endian ordering, and sign extension.
How Data will be Stored in Memory in the MIPS Architecture?9:08
The MARS IDE0:38
First Program in MIPS Assembly4:24
MIPS System Call Functions + Several Examples -Uploaded Feb 8,202442:39
Explore MIPS system call functions in the Mars simulator, loading service numbers into v0 and using a0 to pass arguments for print and read operations.
MIPS System Call + Downloadable Resource3:27
Learn how MIPS system calls handle input-output by reading a character or numbers (integer or float), printing an integer, and using $v0 with service numbers and $a0-$a2 for arguments.
Simple I/O and MIPS System Calls: Hello World!2:19
Simple I/O and MIPS System Calls: Read 2 Numbers and Display their Summation4:45
Read two integers from the keyboard using MIPS system calls, sum them in registers, and print the result with prompts for each input.
Swapping the Bit Positions14:50
Write a program that asks the user to enter an unsigned number and read it. Then swap the bits
at odd positions with those at even positions and display the resulting number. For example, if the
user enters the number 9, which has a binary representation of 1001, then bit 0 is swapped with
bit 1, and bit 2 is swapped with bit 3, resulting in the binary number 0110. Thus, the program
should display 6.
Determine the Value of a Bit at a Specific Position12:00
Write a program that asks the user to enter and integer number and read it. Then ask him to
enter a bit position (between 0 and 31) and display the value of that bit.
Simple I/O and MIPS System Calls: an Example of IF-ELSE Structure in MIPS5:15
Read two integers from the keyboard, compare them using MIPS branch instructions, and print one of two messages depending on which is larger, illustrating a basic if-else structure.
Simple I/O and MIPS System Calls: an Example of IF-ELSE-IF Structure in MIPS5:30
Arithmetic Operations in MIPS - Lecture Note with Examples3:05
MIPS Loop Example9:24
MIPS Multiplication Instruction2:29
MIPS Divide Instruction + Determine whether the input number is odd or even4:54
Explore the MIPS divide instruction, which stores the remainder in hi and the quotient in lo, to determine if the number is even or odd by dividing by two.
MIPS Example: Read 5 Numbers and Print Their Average5:30
Read five numbers via keyboard inside a loop, accumulate a sum in a register, compute the average by dividing by five, and print both results using system calls.
MIPS Arithmetic and Logic Instructions- Online Session36:37
Learn mips arithmetic and logic instructions, including register and immediate addressing, 32 registers with $0 zero, and high/low results for multiply/divide, plus overflow concepts.
MIPS Example: Display the Multiplication of 2 numbers + Factorial Example11:29
Read two numbers from the keyboard, multiply them in MIPS assembly, and display the result using system calls; then implement a factorial with a for loop.
MIPS Example: Add Two Integer Numbers4:57
Compute the greatest common divisor of 2 numbers + Solution
Convert Pseudo Instructıons to MIPS ınstructıons with SOLUTION

Flow Control Instructions - Uploaded Feb 8,202437:15
MIPS Branch Instructions with Examples48:54
Explore MIPS branch instructions with real-world examples, using branch equal and branch not equal to implement for and while style loops, plus unconditional jump with labels.
Control Flow Structures - Lecture Note with Several Examples2:20
MIPS Lectuer3:39
Read a char and determine whether it is an uppercase, lowercase or etc. in MIPS6:50
Teach students how to read a character from the keyboard in MIPS assembly and classify it as uppercase, lowercase, or other using ASCII ranges and branch logic.
MIPS Example: Determine the number of zeros in the binary notation of a number6:33
Develops a MIPS program that prompts the user for an integer and displays the number of zeros in its binary representation, using and right shifts.
MIPS Example: Read two numbers A and B and compute and print (A+2*B)/52:41
Learn how a MIPS program reads two integers A and B, computes (A + 2*B) / 5 using a shift-left doubling of B, and prints the result.
MIPS Example: Convert C code to MIPS Assembly7:13
Convert a C-style algorithm to MIPS assembly by reading two integers and evaluating cases. Use registers t0, t1, t2, divisibility checks by two and by five, and print case messages.
MIPS Examples: Learn How to Divide and Multiplication12:17
Learn how MIPS handles multiplication and division using hi and lo registers, with move from high and low. Includes examples of multiplies, printing via system calls, and a factorial loop.
MIPS Example: Find Both Maximum and Minimum of an Input Integer Array4:26
MIPS Example: Nested IF-ELSE IF Structure9:22
Write a MIPS assembly program that reads a grade, checks if it is at least 60 to pass, and prints the corresponding letter grade using nested if-else logic.
MIPS Example: Convert a capital letter to lowercase and vice versa6:10
MIPS Example: Check the input character and determine is it alphabet, digit or .4:39
MIPS Example: Read 2 operands and an operator and print the result6:39
This lecture demonstrates a MIPS program that prompts for two integers, reads an operator (+ or -), and prints the sum or difference, or an invalid operator message using an if-else.
MIPS Example: Compute the sum of N integers: (1 + 2 + ... + N), While Structure4:46
Find the Maximum Element of an Array in MIPS Assembly Language9:35
Declare a five-element array in MIPS using space directive, read five numbers from the keyboard, store them, and compute the maximum element by comparing elements and updating the max variable.
Testing primality1:34
Reverse the elements in an array by using a stack1:09
Multi-Dimension Array Implementation Example1:20
Translate High Level Language to MIPS Assembly with Solution
Arrays Exercise with Solution
Calculate Absolute Value with Solution
Writing MIPS code with Solution

Procedures in MIPS - A Complete Lecture (Uploaded 7 Feb, 2024)37:24
Procedure Calls - Lecture Note with Several Examples3:20
Functions in MIPS - Jump and Link (jal) & jump Register(jr) Instructions8:22
Explore how MIPS calls functions with jal to save the return address in $ra, pass arguments in $a0–$a3, and return values in $v0–$v1, then use jr to resume.
Functions in MIPS - How to Pass Arguments to the Functions?7:17
Learn how to pass up to four arguments in MIPS using $a0-$a3 and return values in $v0 and $v1, with function calls via jump and link, illustrated by a factorial.
Functions in MIPS - Who saves the register? Spilling Registers3:53
Explore optimizing MIPS functions by reducing instructions and spills, saving and restoring important registers to prevent overwriting across calls, and clarify who saves registers (caller vs callee).
Functions in MIPS - MIPS's conventions to split register spilling chores5:23
Describe MIPS conventions that split registers between caller and callee, detailing saving and restoring of $zero, $v0, $v1, and $t0–$t7, plus the return address across function calls.
Functions in MIPS - MIPS Stack and Push and Pop Implementations5:24
Show how nested function calls save return addresses on a stack and implement push and pop in MIPS by adjusting the stack pointer and using store/load for t1 and t2.
First MIPS Function Example! include inline documentation2:16
Functions in MIPS -Factorial Function7:05
This lecture shows implementing a factorial function in MIPS assembly, initializing f to 1 and looping to multiply by i; main program reads a number and prints factorial with $v0.
MIPS Example: Write a function to read N numbers and store them in an array5:28
Implement a MIPS function that reads N numbers and stores them in an array. The routine uses two arguments, initializes stack and registers, loops through elements, and prints prompts.
MIPS Example: Write a function to reverse an input array5:39
Demonstrates a MIPS function that reverses an input array by swapping symmetric elements with two pointers and a loop running n/2 times.
MIPS Example: Write a function to count the number of divisors of an argument3:38
Recursive Function - Factorial2:46
Example Program: Recursive Fibonacci Function1:17
Insertion Sort Function0:48
String to Number Exercise with solution
Advanced String to Number Exercise with Solution
Translate a Recursive Function to MIPS with SOLUTION
Convert an Integer Number to String (int2str) with Solution
Advanced Number to String(int2str) with Solution
Function Exercise with Solution
Recursive Factorial Function with Solution
MIPS subroutine Exercise with Solution
MIPS Function Exercise with Solution

***New2026*** Foundations of Machine Instruction Sets and Characteristics5:45
This presentation provides an in-depth look at the fundamental nature of machine instructions, which are the binary commands that dictate every operation a processor performs. By exploring the processor’s instruction set, the video illustrates how these commands serve as the primary means for a programmer to control the computer's hardware.
The overview covers several key areas:
• Elements of an Instruction: You will learn about the four essential components of any machine instruction: the operation code (opcode), which specifies the task; source operand references (inputs); result operand references (outputs); and the next instruction reference, which tells the processor where to go next.
• The Instruction Cycle: The video breaks down the steps the processor takes to execute these commands, including instruction fetching, decoding, and operand address calculation.
• Instruction Formats and Addressing: We examine how instructions are represented as a sequence of bits divided into specific fields. The discussion includes the design trade-offs between three, two, one, and zero-address architectures, highlighting how the number of addresses affects processor complexity and program length.
• Instruction Types: The sources categorize instructions into four functional groups: data processing (arithmetic and logic), data storage (memory movement), data movement (I/O), and control (test and branch).
• Types of Operands: Finally, the overview describes the various forms of data that instructions manipulate, such as addresses, numbers (including packed decimal), characters (ASCII and EBCDIC), and logical data.
Whether represented as binary bits for the computer or as symbolic mnemonics (like ADD or LOAD) for the programmer, machine instructions are the core language of computing.
Analogy: Think of a machine instruction as a recipe card for a chef: the opcode is the action (like "bake" or "chop"), the operands are the ingredients found in specific cupboards (registers or memory), and the instruction format is the layout of the card that ensures the chef can quickly find the information needed to move on to the next dish.
MIPS Addressing Modes- Lecture Note4:15
MIPS Instruction Formats with Several Examples - Uploaded Feb 7,202442:32
Learn how MIPS instruction formats R, I, and J encode assembly into 32-bit machine code, including opcodes, function codes, register fields, shifts, immediates, and example translations to binary and hex.
MIPS Instruction Encoding: R-Type Instructions + Downloadable materials6:42
Explore MIPS instruction encoding across r-type, i-type, and j-type formats, each 32 bits, with opcodes and function codes guiding registers, shift amounts, and immediate or address fields.
MIPS Instruction Encoding: I-Type Instructions4:17
MIPS Instruction Encoding : J-Type Instruction6:03
Explore MIPS j-type instruction encoding, using a 26-bit target multiplied by four and concatenated with the PC's upper bits to form a 32-bit absolute address, highlighting pseudo direct addressing.

***New2026*** RISC vs, CISC: Intel 8086 Architecture and the MIPS Comparison7:30
Explore the fascinating evolution and technical contrasts of the Intel 8086, one of the oldest and most prevalent processor architectures in computing history. This video provides a comprehensive comparison between the Complex Instruction Set Computer (CISC) philosophy embodied by the 8086 and the Reduced Instruction Set Computer (RISC) approach found in the MIPS architecture.
What you will learn in this video:
• Registers & Architecture: We compare the 32 uniform 32-bit registers of MIPS against the 8086’s limited set of general-purpose and specialized registers, such as EAX, EBX, ESP, and EIP. Having fewer general-purpose registers in the 8086 often necessitates more frequent and slower memory accesses.
• Instruction Set Philosophies: Understand the difference between the MIPS three-address, register-to-register model and the 8086 two-address, register-to-memory model. While 8086 supports complex addressing modes like scaled indexing to simplify array access, its instruction formats vary wildly from 1 to 17 bytes, making hardware decoding significantly more complex than the uniform 32-bit instructions of MIPS.
• Memory Management: Dive into the 8086’s unique segmented memory model, where 20-bit addresses are generated using segment and offset registers like CS:IP. We also examine why the 8086 lacks the data alignment restrictions found in MIPS, which allows for flexibility but can impact performance.
• Control Flow & Function Calls: Compare how these two giants handle branching and subroutines. While MIPS uses explicit register-based return addresses, the 8086 relies on the stack via CALL and RET instructions and uses the EFLAGS register to manage conditional jumps based on status bits like Zero (Z) and Carry (C).
• The Legacy of the x86: Trace the timeline from the original 16-bit 8086 in 1978 to the Pentium 4, which achieves high clock rates by translating complex instructions into a RISC-like core for deeper pipelining.
Whether you are interested in the hardware trade-offs of the 1980s or how modern Intel CPUs maintain backward compatibility while adopting RISC-based ideas, this comparison offers a deep look into the "headaches" and triumphs of processor design.
Analogy for Understanding: Think of the MIPS architecture like a professional kitchen where every tool is a specialized, single-purpose knife that is easy to keep sharp and fast to use, but requires many steps to prepare a meal. In contrast, the Intel 8086 is like a Swiss Army knife: it has many different, complex attachments that can do several tasks at once, which saves space in your pocket (memory) but makes the tool itself much more complicated to handle and maintain.
***New2026*** Architecture and Instruction Set Data Types and Operations8:04
0:00 – Introduction: The Role of Instruction Sets The video opens by defining the instruction set as the essential "toolset" that allows a compiler to translate high-level code into machine-level instructions optimized for a specific processor.
0:45 – Data Foundations and Endianness
• x86 Types: We cover the general data types (8 to 128 bits) and the x86 little-endian storage style.
• ARM Types: Contrast this with ARM’s support for 8, 16, and 32-bit lengths. We highlight the E-bit (SETEND instruction), which allows ARM processors to dynamically switch between big and little-endian formats to match the OS environment.
1:50 – The Seven Universal Instruction Categories We briefly categorize the operations found on almost all machines: Data Transfer, Arithmetic, Logical, Conversion, I/O, System Control, and Transfer of Control. Data Transfer is highlighted as the most fundamental, requiring the specification of operand locations, data length, and addressing modes.
2:45 – Logical Operations and "Bit Twiddling" Learn how processors manipulate individual bits using AND, OR, and XOR. We show a quick example of using logical shifts and masks to "unpack" characters from a 16-bit word for transmission.
3:50 – Control Flow: Branches and Skips Understand how the processor updates the program counter to handle loops and decision-making. We distinguish between unconditional jumps and conditional branches based on status flags like Zero, Sign, and Overflow. We also introduce the skip instruction (like the ISZ), which performs an action and skips the next instruction if a condition is met.
5:00 – Procedures and the Stack Frame A look at the procedure, a self-contained program that can be "called" and "returned" from. We visualize the stack frame, which stores the return point, old frame pointer, and local variables. This section explains how x86 uses ENTER and LEAVE instructions to manage these frames in a single step.
6:30 – MMX and SIMD Performance Discover how Single-Instruction-Multiple-Data (SIMD) allows a processor to perform one operation on multiple data elements simultaneously. Using MMX technology, we show how image processing instructions can be reduced from 1.4 billion to just 535 million.
7:30 – ARM’s Conditional Execution The video concludes with ARM’s unique 4-bit condition field, which allows virtually every instruction to be executed conditionally. This RISC-based design results in shorter programs and more efficient memory use.
Computer Performance5:39
Explore how clock speed, instruction count, and CPI determine computer performance, and how high-level code translates through compiler and assembler into binary for efficient hardware execution, reflecting Moore's Law.
Datapath- Complete Lecture with Several Examples31:35
Generic Datapath and Register Files Part 1 + Downloadable Resource9:27
Explore the generic datapath of a digital computer, detailing registers, an ALU, a shifter, their interconnection, and how decoders, destination select, and load enable govern micro operations.
Generic Datapath and Register Files Part 218:57
ALU Design - Part 2 (New Lecture)- Uploaded Feb 9,202426:46
Understand addition with carry and subtraction with borrow, enabling multi-bit arithmetic beyond processor width, and learn to design an ALU combining arithmetic and logic via multiplexers.
ALU Design Part 113:50
Design an ALU with inputs x and y and a carry in, using a four-by-one mux to select signals, enabling transfer, increment, add with carry, and subtract for eight-bit operations.
ALU Design Part 230:16
Design a one-bit alu for a MIPS processor by combining arithmetic and logic units, using a four-by-one multiplexer, and enable shifts via a barrel shifter and register file.
Design a Simple ALU + Quiz Solution28:40
Design a four-bit ALU that adds or subtracts via M, outputs in two's complement, and uses full adders and multiplexers for add with carry, subtract with borrow, increment, and transfer.

MIPS Datapath Overview + Downloadable Resources3:02
Explore the MIPS datapath, including instruction memory, data memory, and the register file, and see how fetch, decode, and execute handle R-type and I-type instructions.
MIPS Single Cycle Datapath - Detailed Explanation, Uploaded Feb 11,202444:12
MIPS Single Cycle Datapath-Part2 -Detailed Explanation, Uploaded Feb 11, 202436:32
Explore the single-cycle MIPS datapath, detailing the register file, ALU, memory, and R-type and I-type operations. See how load word and store word paths, sign extension, and program counter integrate.
MIPS Single Cycle Datatpath-Part3 -Detailed Explanation, Uploaded Feb 11,202426:10
Explains how a MIPS single-cycle datapath computes branch targets and jump targets, using immediate shifting, pc addition, and program counter multiplexers guided by the zero flag.
Quiz Solution + Register Transfer Language and datapath41:54
Single Cycle Datapath & Control Unit, Detailed Explanation, Uploaded Feb 11,202439:02
Datapath for Fetching an Instruction and increment PC in MIPS Architecture1:47
Explain the datapath for fetching an instruction and incrementing the program counter in MIPS, linking instruction memory, a register, and a 32-bit adder to read the opcode.
Datapath for R-type Instruction in MIPS Architecture5:58
Explore the datapath for r-type mips instructions, reading two registers from the register file, performing an alu operation determined by the function field, and writing back to the destination register.
MIPS Datapath for Load Word (LW) and Store Word (SW) Instructions5:44
Explore the MIPS datapath for lw and sw, including sign extension, address calculation from base plus offset, and memory read/write control signals.
Datapath for Branch Instructions in MIPS Architecture4:07
Combining the Datapaths of R-type Instructions and LW/SW Instructions6:10
Combine the datapaths for r-type and lw/sw instructions using two multiplexers to choose inputs to the operation and the register file, and control memory-to-register and memory-write signals.
Integrating the datapaths of R-Type, Memory and Branch Instructions in MIPS Arc7:29
R-Type + Memory Instructions Data Path6:25
Explore the mips data path for R-type and memory instructions, including instruction fetch, program counter increment by four, register file access, alu operations, and memory read/write with sign-extended immediates.
Control Unit for the Single-cycle MIPS Processor17:28
Design the control unit for a single-cycle MIPS processor, generating opcode-driven signals to control ALU, memory, register writes, and pc updates for R-type, I-type, load, store, branch, and jump instructions.
ALU Control Unit Design for MIPS Architecture6:44
Design and analyze the ALU control unit for a MIPS processor, showing how opcode and function fields drive add, subtract, or, set less than operations, with load and branch support.
(NEW2023) Single Cycle Quiz Solution + Register Transfer Language (RTL)30:06
Explains the single-cycle MIPS datapath using RTL to implement R-type and I-type instructions, detailing instruction fetch, register file, ALU operations, sign extension, and program counter updates.

Multi-Cycle Datapath for MIPS Architecture Part 1 + Downloadable Resources14:55
Multi-Cycle Datapath for MIPS Architecture Part 2 - Enhanced Voice17:34
Examine the multi-cycle datapath for the MIPS architecture, covering instruction fetch and decode, memory address computation, R-type execution, and memory read/write steps for load and store, branch and jump handling.
Multi-Cycle Datapath for MIPS Part 3 - Enhanced Audio and corrected Caption6:40
Explore the multi-cycle datapath for a MIPS R-format instruction and a branch-equal, detailing instruction fetch, program counter updates, ALU operations, and register file interactions.
Multi Cycle Datapath - Online Session56:46
MIPS Multi Cycle Datatpath -Detailed Explanation, Uploaded Feb 12,202455:03
Explore the multi-cycle datapath for MIPS, detailing instruction fetch, decode, execute, memory access, and write-back across R-type, I-type, load/store, branch, and jump, with control signals and path choices.
More advanced CPUs8:03
Learn how CPUs achieve speed beyond raw clock rate by using multi-cycle and pipelined designs, with microinstructions, hazards, and real-world tradeoffs from the gigahertz war.

Tutorial + Assignment: Introduction to MARS
Tutorial + Assignment #1: Introduction to MIPS Assembly Programming
Solution Video: Assignment #1-Exercise 1's Solution4:08
Ask the user to enter an integer value, and then print the result of doubling that number. Use the ADD instruction.
Solution Video: Assignment #1-Exercise 2's Solution3:53
Modify again the program shown in Figure 2.4. Ask the user whether he wants to repeat the program. Use service code 12 to read a character and the branch instruction to repeat the main function if the user input is character 'y'.
Solution Video: Assignment #1-Exercise 3's Solution3:40
Write a MIPS program that asks the user to input his name and then prints Hello, followed by the name entered by the user.
Solution Video: Assignment #1-Exercise 4's Solution4:07
Write an MIPS program that executes the statement: s = (a + b) (c + 101), where a, b, and c are user-provided integer inputs, and s is computed and printed as an output.
Solution Video: Assignment #1-Exercise 5's Solution4:15
Write an MIPS program that inputs two integer values. The program should output if the two integers are equal. Otherwise, it should output. Use the branch instruction to check for equality.
Tutorial + Assignment #2: Integer Arithmetic
Solution Video: Assignment #2-Exercise 4's Solution12:27
Write a program that asks the user to enter an alphabetic character (either lower or upper case) and change the case of the character from lower to upper and from upper to lower and display it.
Solution Video: Assignment #2-Exercise 5's Solution12:00
Write a program asking the user to enter and read an integer number. Then ask him to enter a bit position (between 0 and 31) and display the value of that bit.
Solution Video: Assignment #2-Exercise 7's Solution14:50
Write a program that asks the user to enter an unsigned number and read it. Then swap the bits at odd positions with those at even positions and display the resulting number. For example, if the user enters the number 9, which has a binary representation of 1001, then bit 0 is swapped with bit 1, and bit 2 is swapped with bit 3, resulting in the binary number 0110. Thus, the program should display 6.
Tutorial + Assignment #3: Flow Control
Solution Video: Assignment #3-Exercise 1's Solution6:15
Write a program that asks the user to enter an integer and then displays the number of 1s in the
binary representation of that integer. For example, if the user enters 9, the program should
display 2.
Solution Video: Assignment #3-Exercise 2's Solution6:01
Write a program that asks the user to enter two integers: n1 and n2, and prints the sum of all
numbers from n1 to n2 . For example, if the user enters n1=3 and n2 =7, then the program
should display the sum as 25.
Solution Video: Assignment #3-Exercise 3's Solution4:17
Write a program that asks the user to enter an integer and then display the hexadecimal
representation of that integer.
Tutorial + Assignment: Arrays and Files
Tutorial + Assignment: Integer Multiplication and Division
Tutorial + Assignment: MIPS Functions and the Stack Segment
Fibonacci sequence
Compute the summation of even numbers between 2 input numbers
MIPS VIrus!
Single-Cycle Datapath Quiz with Video Solution
Simple I/O in MIPS Assembly Language
IF-ELSE-IF Structure in MIPS Assembly Language
Multi-cycle Datapth

Processor Pipelining: The Assembly Line of Computation9:51
Explore how pipelining overlaps the five stages to boost throughput. Balance clock speed and CPI with fixed 32-bit MIPS, out-of-order execution, and holistic hardware and software design.
Intelligence in the Pipeline6:48
This lecture details the architecture and management of a five-stage CPU pipeline, which functions like an efficient assembly line to process multiple instructions simultaneously. While the datapath provides the physical framework for movement, the Control Unit acts as a conductor by generating specific electronic signals that dictate how hardware components behave for different tasks. These command signals are pipelined alongside data, ensuring that each instruction receives the correct instructions for math, memory access, or writing results at the precise clock cycle. By synchronizing these operations, the processor achieves peak throughput, allowing various hardware units to work in parallel without conflict. This sophisticated orchestration transforms basic hardware into an intelligent machine capable of high-speed modern computation.
The Assembly Line of Computation7:34
This lecture gives a comprehensive overview of processor pipelining, explaining how this technique uses the concept of an assembly line to significantly increase CPU performance. The materials first illustrate the inefficiency of processing instructions one at a time, where the overall time is dictated by the critical path or slowest step. By breaking instruction execution into multiple stages (like Fetch, Decode, Execute, Memory, and Write Back) and overlapping them, pipelining drastically improves throughput, though it does not reduce the latency of a single instruction. The sources further discuss how specialized hardware like pipeline registers enables this parallel execution and note that historical attempts to use overly deep pipelines, such as in the Pentium 4, demonstrated a trade-off where higher clock speeds increased the penalty for pipeline stalls. Ultimately, modern processor design aims for an optimal balance between clock speed and factors like Cycles Per Instruction (CPI) to maximize performance.
The Hidden Engine: Mechanics of Advanced Branch Prediction8:02
Modern processors face a significant bottleneck because approximately one-fifth of all instructions are branches, which can disrupt the smooth flow of data. To combat this, hardware utilizes branch prediction to guess the outcome of these decisions, preventing the massive performance losses that occur when a CPU must discard incorrectly processed work. The technology has evolved from simple static rules and basic one-bit sensors to sophisticated two-bit predictors that use "hysteresis" to avoid frequent errors. Advanced systems now even analyze global history to identify complex patterns and correlations across different parts of the code. By increasing the accuracy of these guesses, a processor can effectively double its performance and maximize the number of instructions it handles simultaneously. Ultimately, these integrated intelligence systems are the hidden engines that enable the high speeds of contemporary computing.
Pipeline Hazards: Taming the Chaos in Modern CPUs8:19
This lecture examines the complex world of CPU pipelining, a process that enhances speed by treating instruction execution like an assembly line. While this method aims for maximum efficiency, it is frequently interrupted by pipeline hazards, which are categorized into structural, data, and control conflicts. To address these issues, the text highlights hardware solutions like forwarding and dedicated memory ports, as well as software strategies such as compiler instruction scheduling. Furthermore, it explains how branch prediction and delayed branching help the processor manage uncertainty regarding future commands. Ultimately, the sources illustrate that modern computing power relies on the sophisticated coordination between hardware design and intelligent software to keep the processing flow steady and fast.

Requirements

Basics of digital logic design
Basic knowledge of programming in any high level languages( C, python , ...)

Description

Welcome to the Computer Architectures and MIPS Assembly Programming Course!

***NEW*** Enrol in one course and receive a 100% discount coupon for any of my other courses.
After you sign up, please send me an email to let me know which course you’d like to take. My email address: shahram.taheri@antalya.edu.tr

*Update- December 2025 - Tens of new lecture videos, slides, and resources are uploaded.

This course is a complete, hands-on journey into Computer Architecture and Organization, designed to take you from zero exposure to confidently understanding how modern computers really work—from the lowest-level instructions all the way up to advanced CPU design concepts.

You will start by learning MIPS assembly programming step by step, using clear explanations and dozens of carefully chosen examples. Even if you have never written assembly code before, you will quickly feel comfortable reading, writing, and debugging MIPS programs. The course emphasizes practical understanding: loops, conditionals, arrays, bitwise operations, system calls, and real problem-solving—not just theory.

As you progress, you will go deeper into functions, stack management, recursion, and calling conventions, gaining the skills needed to translate high-level language logic into low-level assembly code. Every major concept is reinforced with multiple examples, assignments, and full solution videos, so you always know not only what works, but why it works.

Beyond programming, the course carefully bridges software and hardware. You will learn how MIPS instructions are encoded, how addressing modes work, and how instructions flow through the processor. Step by step, you will build a strong intuition for datapaths, ALU design, register files, and control units. Single-cycle and multi-cycle processor designs are explained visually and logically, making complex hardware concepts approachable and memorable.

The course then expands into essential modern architecture topics such as pipelining, hazards, branch prediction, parallelism, memory hierarchy, caches, virtual memory, and I/O systems. These sections connect textbook theory to real CPU behavior, helping you understand performance, scalability, and design trade-offs used in real-world processors.

This course is ideal for:

Computer engineering, electrical engineering, and computer science students
Learners preparing for advanced architecture, operating systems, or embedded systems courses
Anyone who wants a deep, practical understanding of how software runs on hardware

By the end of this course, you will not only write MIPS programs with confidence, but also clearly understand how instructions move through a CPU, how memory systems are designed, and how performance is optimized in modern computers. If you have ever wanted to truly understand what happens “under the hood” of a computer, this course is your complete roadmap.

The emphasis of the course is on understanding how computers work. This will provide a basis for further study of computer architecture and computer software. The MIPS processor, the subject of this course, has a well designed architecture and is particularly fruitful to study. However, the goal of the course is not to turn you into a MIPS programmer, but to give you an understanding of all computer systems.

Course Outline

1. Introduction to MIPS Assembly Programming

Memory Operand: Load Word & Store Word in MIPS Assembly Language
Immediate Addressing Mode & Signed/ Unsigned data in MIPS Assembly Language
ADD, ADDI, ADDU, ADDIU, SUB, LW, and SW Instructions in MIPS
Branches and Jump Instruction in MIPS Assembly Language + how to read array[i]
Loop Structure in MIPS Assembly Language
The Other Comparison Instruction + Logical Instructions in MIPS
MIPS Alignment Restrictions: .align, .byte .half and .word Assembler's directive
How Data will be Stored in Memory in the MIPS Architecture?
MIPS System Call
Simple I/O and MIPS System Calls: Hello World!
Simple I/O and MIPS System Calls: Read 2 Numbers and Display their Summation
Simple I/O and MIPS System Calls: an Example of IF-ELSE Structure in MIPS
Simple I/O and MIPS System Calls: an Example of IF-ELSE-IF Structure in MIPS
MIPS Divide Instruction + Determine whether the input number is odd or even
MIPS Example: Read 5 Numbers and Print Their Average
MIPS Multiplication Instruction
MIPS Example: Display the Multiplication of 2 numbers + Factorial Example
MIPS Example: Add Two Integer Numbers

2. Learn MIPS Programming with Examples

MIPS Example: Read a char and determine whether it is an uppercase, lowercase or etc. in MIPS
MIPS Example: Determine the number of zeros in the binary notation of a number
MIPS Example: Read two numbers A and B and compute and print (A+2*B)/5
MIPS Example: Convert C code to MIPS Assembly
MIPS Examples: Learn How to Divide and Multiplication
MIPS Example: Find the Maximum Element of an Array in MIPS Assembly Language
MIPS Example: Find Both Maximum and Minimum of an Input Integer Array
MIPS Example: Nested IF-ELSE IF Structure
MIPS Example: Convert a capital letter to lowercase and vice versa
MIPS Example: Check the input character and determine is it alphabet, digit or .
MIPS Example: Read 2 operands and an operator and print the result
MIPS Example: Compute the sum of N integers: (1 + 2 + ... + N), While Structure

3.Functions in MIPS Assembly Language with Several Examples

Functions in MIPS - Jump and Link (jal) & jump Register(jr) Instructions
Functions in MIPS - How to Pass Arguments to the Functions?
Functions in MIPS - Who saves the register? Spilling Registers
Functions in MIPS - MIPS's conventions to split register spilling chores
Functions in MIPS - MIPS Stack and Push and Pop Implementations
Functions in MIPS - Factorial Function
MIPS Example: Write a function to read N numbers and store them in an array
MIPS Example: Write a function to reverse an input array
MIPS Example: Write a function to count the number of divisors of an argument

4.MIPS Instruction Encoding

MIPS Instruction Encoding: R-Type Instructions
MIPS Instruction Encoding: I-Type Instructions
MIPS Instruction Encoding : J-Type Instruction

5. Computer Architecture: Processor Datapath, ALU and Register File Design

Generic Datapath and Register Files Part 1
Generic Datapath and Register Files Part 2
ALU Design Part 1
ALU Design Part 2

6. Single-Cycle Datapath for MIPS Architecture

MIPS Datapath Overview
Datapath for Fetching an Instruction and increment PC in MIPS Architecture
Datapath for R-type Instruction in MIPS Architecture
MIPS Datapath for Load Word (LW) and Store Word (SW) Instructions
Datapath for Branch Instructions in MIPS Architecture
Combining the Datapaths of R-type Instructions and LW/SW Instructions
Integrating the datapaths of R-Type, Memory and Branch Instructions in MIPS Arc
R-Type + Memory Instructions Data Path
Control Unit for the Single-cycle MIPS Processor
ALU Control Unit Design for MIPS Architecture

7. Multi-Cycle Datapath for MIPS Architecture

Multi-Cycle Datapath for MIPS Architecture Part 1
Multi-Cycle Datapath for MIPS Architecture Part 2
Multi-Cycle Datapath for MIPS Architecture Part 3
Multi-Cycle Datapath for MIPS Architecture Part 4

8. Tutorials + Assignments

Tutorial + Assignment: Introduction to MARS
Tutorial + Assignment: Introduction to MIPS Assembly Programming
Tutorial + Assignment: Integer Arithmetic
Tutorial + Assignment: Flow Control
Tutorial + Assignment: Arrays and Files
Tutorial + Assignment: Integer Multiplication and Division
Tutorial + Assignment: MIPS Functions and the Stack Segment
Fibonacci sequence
Compute the summation of even numbers between 2 input numbers
Simple I/O in MIPS Assembly Language
IF-ELSE-IF Structure in MIPS Assembly Language
Single-Cycle Datapath Quiz with Video Solution
Multi-cycle Datapth

The course is Example-based. Almost every lecture and component of the course directly leads to a hands-on laboratory assignment with a solution. The more you practice with MIPS hardware and software, the more proficient you will become.

I use lots and lots of examples. I take you step-by-step through the lessons – each time providing sample code and documentation to make sure you are supported through the course.

The course does not waste your time. From the very beginning, we jump right into your first project – Let's Get Started.

I am here to help. I am an educator with a singular focus on providing a meaningful experience for my students. And, while I cannot do the work for you, I am willing to work WITH you to help you succeed.

The goal of this course is to shed light on the obscure interface layer between hardware and software. In this context, we will go over instruction set architectures, assembly programming, computer/memory organization, machine language conversion, data bus, and sub-routines, which are all important topics in computer architecture. This course teaches students about the core hardware components of a computer and how they interact with one another. It educates students about the computer's many layers, such as the application level, operating system level, assembly language level, and machine language level.

Computer architectures, which I recommend to anyone working on electronic system design or computer programming and who is interested in processor design, have opened many doors for me in my own career. I hope you find this tutorial useful as well.

Who this course is for:

Computer or Electrical Engineering students
Programmers who want to learn about computer hardware / software interface
Everyone who is interested in Computer / Processor structures!
Candidates considering applying for embedded system design / programming positions in defense industry, aerospace, R&D and IT companies

Computer Architecture and MIPS Assembly Language Programming

What you'll learn

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Course content

Sample MIPS Videos3 lectures • 26min

MIPS Assembly Programming31 lectures • 7hr 22min

Learn MIPS Programming with Examples19 lectures • 2hr 57min

Functions in MIPS Assembly Language with Several Examples15 lectures • 1hr 40min

MIPS Instruction Encoding6 lectures • 1hr 10min

Computer Architecture: Processor Datapath, ALU and Register File Design10 lectures • 3hr 1min

Single-Cycle Datapath for MIPS Architecture16 lectures • 4hr 43min

Multi-Cycle Datapath for MIPS Architecture6 lectures • 2hr 39min

Tutorials + Assignments + Solution Videos11 lectures • 1hr 16min

Processor Pipelining (December 2025)-Under Construction5 lectures • 41min

Requirements

Description

Who this course is for: