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Building a Processor with Verilog HDL from Scratch
Rating: 4.4 out of 5(275 ratings)
2,086 students

Building a Processor with Verilog HDL from Scratch

Using Xilinx Vivado 2020.2
Created byKumar Khandagle
Last updated 10/2024
English

What you'll learn

  • Startegies to implement Verilog based CPU
  • Buliding Custom Intruction Set to meet resource utilizations
  • Strategies to add Program and Data Memory inside Processor
  • Strategies to add Jump and Branching Instructions inside Processor

Course content

5 sections64 lectures2h 59m total length
  • Understanding Processor architecture4:37
  • Agenda0:54
  • Types of Instructions8:41
  • Addressing Modes4:35
  • Understanding Intruction Register3:48
  • Adding Instruction Register and GPR to Processor4:35
  • Understanding Arithmetic and Move intructions of Processor4:59

    Learn how the processor performs add, subtract, and multiply in immediate and register modes, using move and move sgpr to handle a special register for 32-bit results.

  • Adding MOV Instructions3:57
  • Adding Arithmetic Instructions3:48
  • Adding TB to verify Instructions P19:05
  • Adding TB to verify Instructions P21:02
  • Design Code0:36
  • Testbench Code0:38
  • OneNote Slides
  • A11 : Testing Multiplication operation

Requirements

  • Fundamentals of Digital Electronics

Description

Most of the 21st-century applications require powerful hardware but also along with the centralized controller allowing the development of complex algorithms. As we enter into the AI or Cloud-based devices and as systems complexity is growing daily, the need for incorporating multiple processor instances becomes mandatory as we progress in the AI era. Zynq and Microblaze are two popular alternatives that exist in the market suitable for almost any application requirements. The requirements of using Multiple instances of Processor viz. Multiple instances of Microblaze soft processor or using a hard processor such as Zynq Processor along with single or multiple instances of  Microblazer become necessary to independently handle both Data processing and control requirements. The fundamental challenge of incorporating multiple instances of Soft processors like Microblaze is the number of resources consumed for implementing Microblaze on the FPGA. Since FPGA consists of a limited amount of the FPGA resources, hardware and Software partition plays a prominent role in building complex systems. Another popular alternative approach followed by Embedded Engineers to build a Custom CPU /   Processor with the only required functionality thereby saving a large amount of the resources as compared to adding Microblaze instance. The course will discuss all the fundamentals required to build a simple processor/ CPU with Verilog HDL and strategies to test its functionality. After completing this course, you will understand all the necessary skills required to build Complex CPU architecture to meet requirements. Best wishes for crafting your own processor.

Who this course is for:

  • Anyone Interested to build Custom CPU on FPGA for Load Sharing