Build Your Own RealTime OS (RTOS) From Ground Up™ on ARM 2

Explore real time operating system concepts, including how an OS acts as a resource manager that schedules tasks and guarantees deadlines. Understand dynamic and static, preemptive and non preemptive scheduling.

Build a simple round-robin RTOS scheduler by creating osKernel files, including a C file, a header, and an assembly context switch, within a new STM32F4 project.

define and initialize the RTOS kernel by creating three thread control blocks, stacks, and a round-robin scheduler; set up the stack frame, clock prescaler, and thumb mode bit for context.

in this lecture, learn to implement osKernelAddThreads for a round-robin rtOS on ARM: define tcb links, initialize stacks and program counter, set time quanta, and expose prototypes in the header.

Implement the osKernelLaunch function by configuring the systick timer, setting time quanta in milliseconds, and preparing the assembly osSchedulerLaunch to start the scheduler.

Develops the osSchedulerLaunch routine in ARM assembly, implementing the system handler and the scheduler launcher, saving and restoring registers, and context switching using the thread control block.

Write the osSchedulerLaunch routine in assembly for a real-time ARM OS, initialize the kernel, create and run threads, and test for equal time slices with a round-robin scheduler.

Explore cooperative schedulers in an arm rtos by implementing an always thread yield function to switch to the next task, enabling run-to-completion and cooperative time quantum sharing.

Set the PendSV interrupt as the RTOS thread switcher on ARM, triggering context switching to minimize latency and keep tick timing intact.

Implement type 1 periodic scheduling in an ARM RTOS by extending the thread scheduler with a periodic tick and a defined period, where periodic tasks run to completion.

Design multiple periodic threads using a modulo trigger within a round-robin scheduler, assigning 100, 200, and 500 period tasks, and prepare for hardware timer interrupt service routine approaches.

Learn to implement periodic task scheduling on arm with a thread control block, integrating periodic tasks into a round-robin scheduler and validating 10 ms and 100 ms periods.

Explore type 4 periodic scheduling using a thread control block and a hardware interrupt, enabling time-left based execution of multiple periodic tasks.

Develop a from-scratch board support package for a discovery board, implementing GPIO output APIs, enabling clocks, and configuring port d pins as outputs to drive leds.

Develop and expose GPIO output board support APIs to turn on, off, and toggle LEDs (blue, green, red, orange) using bitwise operations on the output data register.

Test gpio output using board support APIs by initializing gpio, toggling four leds, and validating on/off states with a hardware delay.

Develop and implement adc board support APIs on arm cortex microcontroller by initializing adc, configuring pins and clocks, and reading conversion results via software-triggered sequences.

Test the bsp adc board support apis by wiring a 10k potentiometer to an adc pin and observing value changes as you turn the knob; sensor read setup works.

Develop the bsp delay function using TIM3 to produce millisecond delays for hardware initialization, while enabling the clock, setting prescalers, and polling the update flag to generate the delay.

Develop gpio input board support apis by configuring the mode register and input data register for a push button, implementing initialization and read functions, and testing on a discovery board.

Configure output pins as probes, define symbolic names, initialize the probes, and verify pin toggling and frequency with an oscilloscope and debugger.

This lecture recaps semaphores, showing how to synchronize activities between threats and control resources like global variables and LCD screens, then implements a counter semaphore with inet, set, and weight.

Implement a spin semaphore API to manage a shared LCD resource across threads. The lesson demonstrates initializing, waiting on, and signaling semaphores to synchronize tasks in an ARM real-time OS.

Apply semaphores to guarantee mutually exclusive access to the lcd screen across multiple threads in a real-time operating system, preventing collisions and crashes during concurrent drawstring operations.

Synchronize tasks using two semaphores to implement rendezvous, signaling each task's arrival and reducing the execution difference between task zero and task one.

Create a cooperative semaphore that yields to ready tasks instead of spinning in a while loop. Reduce processor cycles and boost RTOS efficiency on ARM.

Implement the osThreadSleep API to put threads to sleep using a SleepTime field in the thread control block and a periodic timer to count down.

Build and test a mailbox for inter-thread data transfer in an RTOS, sending data from a producer to a consumer via mailbox, using send/receive functions, init, flags, and a semaphore.

Explore inter-thread communication with a pfeifle fifo between producer and consumer threads in an rtos, including initialization, put/get, semaphores, and multi-producer testing with an adc-driven led demo.

Build a priority-based RTOS scheduler on ARM that runs the highest-priority non-blocked task first. Add a priority field to each thread control block and connect eight tasks to demonstrate scheduling.

Develop a uart driver from scratch for an arm microcontroller, enabling clocks, configuring pins for alternate function, and setting baud, data bits, and stop bits to monitor results with printf.

Build a three-state finite state machine in C for an ARM RTOS project, using an enum, function-pointer table, and clock-driven transitions with simple print outputs.

Build a finite state machine on ARM using a timer, HAL init, and tick-based delays; measure with current time, delta seconds, and print state timings.

Develop a fixed scheduler with a finite state machine by arranging the state table to execute states A, B, and C in an order, using clock modulo and zero reset.

Explore the RISC design philosophy and how ARM designs architectures and licenses them to brands, then learn how single-cycle instructions at high speed, pipelines, and flexible registers operate.

Explore the ARM design philosophy of small, power-efficient cores and high code density for embedded devices, and compare risk architecture with cisc architecture, including compiler roles and endian options.

Explore how arm-based embedded systems integrate processors, memory, buses, and peripherals to control devices—from sensors to washing machines and space shuttles—using interrupt controllers, memory management, and bridges.

Explore ARM bus technology and the AMBA bus protocol, distinguishing bus masters from slaves, and the physical and protocol levels, including 16-, 32-, and 8-bit widths and a multiplexed bus.

Explore the memory hierarchy in embedded systems, from cache to main memory and ROM, and how memory width impacts performance and power in ARM and Thumb.

Unpack the generic architecture behind interfaces and peripherals for embedded systems, including memory-mapped peripherals, memory controllers, and interrupt controllers, and how software configures memory timings and address registers.

Compare von Neumann and Harvard architectures, detailing a single data and instruction bus versus separate memories and two buses, and discuss cost, implementation, and performance implications.

Discover how cache memory and tightly coupled memory boost real-time embedded performance with fast, predictable access. Compare Harvard and Von Neumann designs and their impact on data and instruction memory.

Explore memory management extensions, including the memory protection unit and the memory management unit, comparing region-based protections, access permissions, and virtual-to-physical address translation, with no protection option.

Explore co-processor extensions that expand a core’s instruction set and configuration registers, support cache memory and memory management, and enable hardware floating point on the Cortex-M4.