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Arm Barriers 101: Part #3: Expanding our toolkit
Rating: 5.0 out of 5(5 ratings)
20 students
Created byAsh Wilding
Last updated 5/2025
English

What you'll learn

  • Discover why Data Memory Barriers are not always sufficient to guarantee ordering.
  • Explore how to use other barriers to enforce ordering in those situations.
  • Learn how Arm formally defines ordering relationships in its weakly-ordered memory model.
  • Learn how to test for missing barriers under simulation.

Course content

1 section5 lectures2h 26m total length
  • Implications of Arm's modified Harvard architecture31:37
  • Simulating barriers using herdtools34:45
  • DMB vs DSB in an Other-multi-copy atomic world30:15
  • Endpoint completion and control dependencies28:09
  • Quiz21:30

Requirements

  • Beginner friendly!
  • Assumes no prior Arm Architecture experience.
  • Some basic C/C++ programming experience is recommended, but not required.
  • Strongly recommended to take our "Arm Barriers 101: Part #2: How barriers work in hardware" course first.

Description

Welcome to Part 3 of our Barriers 101 training course, a comprehensive deep dive on barriers in the Arm® Architecture.

This course is suitable for software engineers working on Arm-based platforms on system-level software, from down at the firmware layer all the way up through to the kernel, hypervisor, and device drivers.

In these lessons, you'll learn:

  • Why Data Memory Barriers are not always sufficient to guarantee ordering.

  • How to use other barriers to enforce ordering in those situations.

  • How Arm formally defines ordering relationships in its weakly-ordered memory model.

  • How to test for missing barriers under simulation.

From beginner to expert: Our courses are suitable for all levels of experience, whether you're already a seasoned veteran of the Arm Architecture or you're seeing Arm Barriers for the very first time.

How it really works: Our courses go both broader and deeper on the topic of barriers than anyone else; we show you how things really work, and more importantly, why.

Learning is doing: Reinforce your learning with 30 multiple-choice quiz questions including a video walkthrough of each question and answer.

Recognised trainer: Our courses are written and produced by Ash Wilding, formerly one of Arm's lead technical trainers and a kernel engineer at both Amazon AWS and Apple.

Who this course is for:

  • Engineers at all experience levels working on Arm-based platforms.
  • Firmware Engineers.
  • Kernel Engineers.
  • Hypervisor Engineers.
  • Device Driver Engineers.