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Arm Barriers 101: Part #2: How barriers work in hardware
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Arm Barriers 101: Part #2: How barriers work in hardware

Interconnects, Shareability domains, and what the hardware is doing when we execute a barrier in software.
Created byAsh Wilding
Last updated 5/2025
English

What you'll learn

  • Discover how Arm AMBA-based cache coherent interconnects work.
  • Explore how Shareability domains are defined in hardware.
  • Visualise memory transactions flowing through the interconnect fabric.
  • Learn how barriers work when being broadcast onto the interconnect for it to handle on behalf of the CPU.
  • Learn how barriers work when they are being handled internally to the CPU.

Course content

1 section • 9 lectures • 3h 12m total length

  • Interconnects and snoop requests17:02
  • Sequencing of coherent writes19:56
  • Defining Shareability domains in hardware16:54
  • Shareability on modern AMBA systems20:50
  • Broadcasting barriers onto the interconnect23:57
  • Distributed mesh network propagation24:37
  • DMA-capable peripheral devices26:38
  • Handling barriers internally to the CPU18:05
  • Quiz24:03

Requirements

  • Beginner friendly!
  • Assumes no prior Arm Architecture experience.
  • Some basic C/C++ programming experience is recommended, but not required.
  • Strongly recommended to take our "Arm Barriers 101: Part #1: Getting started with barriers" course first.

Description

Welcome to Part 2 of our Barriers 101 training course, a comprehensive deep dive on barriers in the Arm® Architecture.

This course is suitable for software engineers working on Arm-based platforms on system-level software, from down at the firmware layer all the way up through to the kernel, hypervisor, and device drivers.

In these lessons, you'll learn:

  • How Arm AMBA®-based cache coherent interconnects work.

  • How Shareability domains are defined in hardware.

  • How barriers work when they're being broadcast onto the interconnect.

  • How barriers work when they're being handled internally to the CPU.

From beginner to expert: Our courses are suitable for all levels of experience, whether you're already a seasoned veteran of the Arm Architecture or you're seeing Arm Barriers for the very first time.

How it really works: Our courses go both broader and deeper on the topic of barriers than anyone else; we show you how things really work, and more importantly, why.

Learning is doing: Reinforce your learning with 30 multiple-choice quiz questions including a video walkthrough of each question and answer.

Recognised trainer: Our courses are written and produced by Ash Wilding, formerly one of Arm's lead technical trainers and a kernel engineer at both Amazon AWS and Apple.

Who this course is for:

  • Engineers at all experience levels working on Arm-based platforms.
  • Firmware Engineers.
  • Kernel Engineers.
  • Hypervisor Engineers.
  • Device Driver Engineers.

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