Analog Circuit Design - An Intuitive Approach

Explore voltage–voltage amplifiers, their Thevenin representations, and loading effects, showing how input resistance, output resistance, and the voltage gain Av determine the signal across the load.

Explore the current-to-current amplifier using Norton input and Norton output models, analyzing loading effects, and the contrasting requirements: low input resistance and high output resistance for maximal current gain.

Demonstrate voltage-to-current amplification via a transconductance gm amplifier, using Thevenin input and Norton output models, and show how gm and high input/output resistances determine gain and loading.

Compare four amplifier models by input and output resistances, and learn how load affects voltage gain, including transconductance gains and mosfet parameter mapping to Norton/Thevenin models.

Review MOSFET equations and intuition for linear and saturation regions using Vgs, Vth, and overdrive, with rules: Vd_min = Vg − Vth and Vg_max = Vd + Vth; PMOS reversed.

Explore mosfet operation in saturation and linear regions, review overdrive voltage vgs minus vth, and study the mosfet current equation, early voltage, and channel length modulation for gm design.

Explore transconductance gm across linear, subthreshold, and saturation regions, deriving gm expressions, and learning when to apply each equation based on which parameter is held constant.

Explore transconductance in saturation, comparing strong and weak inversion forms of gm and gm/id, and show how moderate inversion balances gm by id with adequate bias current.

Derive the MOSFET output resistance in saturation from the current equation with channel length modulation, showing how Rds depends on channel length and lambda dash via Id and Vds.

Present the small signal model of a mosfet in saturation, with infinite gate input resistance, a gm vgs current source, and ro for length modulation, applicable to nmos and pmos.

Show gate input resistance is infinite; drain impedance equals ro, and source impedance equals ro/(1+gm ro), approximating to 1/gm for large gm ro.

Analyze the mosfet source resistance with drain resistance; it equals (r0 + rd)/(1 + gm r0), showing drain resistance reflected at the source and divided by the intrinsic gain.

Model a common source amplifier with Thevenin equivalents to derive the intrinsic gain of -gm R0 and examine how RL and loading reduce the output.

Explore the common drain amplifier as a buffer with non-inverting gain from gate to source, infinite input resistance, and low output resistance, gain GM R0/(1+ GM R0).

Explore the common gate amplifier, with input at the source and output at the drain, yielding open-circuit gain of one plus gm ro.

Compare common source, common drain, and common gate amplifiers to choose applications; the common drain acts as a near unit gain buffer, while the common source provides higher inverted gain.

Explore how source degeneration increases the drain's output resistance, deriving ro + rs(1+gm ro) and clarifying gm ro's role in common source and related configurations.

Analyze how a source resistance suppresses the source voltage in response to drain voltage changes, yielding vs ≈ vx divided by gm, and revealing shock-absorber effect that increases drain resistance.

Analyze output resistance of a diode-connected mosfet by shorting gate to drain, derive 1/gm, and explore how intrinsic gain gm*r0 and the source resistor influence downward resistance in multi-device circuits.

In two cascaded mosfets, input location changes the gain: top-gate input yields squared intrinsic gain, while feeding the second gate yields gm r0 due to vgs scaling by 1/(1+gm r0).

Explore how cascading n mosfet stages multiplies the output resistance, yielding Rout ≈ GM R0^n, and learn the intuitive pattern for calculating the final stage's resistance.

Show how a two-stack mOSFET connected to a negative-gain amplifier increases vgs and gm, yielding an output resistance equivalent to a three-stack mOSFET without extra stages.

Decrease gm by lowering vgs in a mosfet and cascade to show capital gm equals gm divided by one plus gm ro, linking short-circuit current and higher output resistance.

Reduce gm to linearize the ids versus vgs curve by adding source resistance rs, so the current is set by Vin and rs rather than vgs.

View the mosfet as a transconductance amplifier; its gm converts vgs to current, which flows through rs to create negative feedback, yielding a closed-loop gain gm/(1+gm rs).

This lecture shows that cascading n common-source amplifiers yields a total gain equal to n times the intrinsic gain, while the output resistance stays the same and power consumption rises.

Explore the cascode amplifier by combining a common source and a common gate stage to achieve gm ro squared gain and discuss high input resistance with low output resistance.

Learn how a cascade of common drain, common gate, and common drain stages creates a high input, low output impedance voltage amplifier with near unity gain.

Explore mosfet device physics, channel creation, and small-signal models through a graphical, intuitive view for analog circuit understanding. Develop small-signal parameters and solve problems in the new problem section.

Explore the body effect in the small-signal model and how bulk-to-source voltage adds gm_b current. Learn to break currents into gm·vg and gm·vz and replace proportional sources by 1/gm.

Explore how body effect modifies the small-signal gm and ro of the common source amplifier, with and without source degeneration, and learn to derive the new expressions.

This lecture examines the body effect on the common drain amplifier, showing gm stays unchanged while the output resistance decreases from ro to 1/(gm + gmb), with input resistance unchanged.

Explore body effect on the common gate amplifier, deriving gain from gm and ro, noting gm increases and input resistance shifts from 1/gm to higher value due to body effect.

Apply superposition to analyze a pmos/nmos inverter as two common source amplifiers with a shared load. Observe that transconductances add and the output halves when the mosfets share the load.

Derive a subtractor circuit using n-mos pull-up, applying superposition with a common drain and a common source model to compute Vo, showing contributions cancel to zero output.

Explore a phase splitter with equal drain and source resistances to generate two phase-shifted signals from a single input.