
Explore the basics of SLC or processor selection, then compare DDR3, DDR4, and DDR5 in detail with a comparison table, and complete the section's quizzes.
Examine the requirements sheet, processor data sheets, and memory interfaces (DDR, LPDDR) for the board design. Distinguish module, SiP, and on-board solutions and apply Altium Designer to schematic and layout.
Explore how to select an SoC or processor by comparing processors with controllers, architectures (von Neumann vs Harvard), memory and caches, cores like big.LITTLE, and bootrom and internal SRM.
Trace the evolution of ddr memory interfaces from ddr to ddr5, explaining data transfer rates, voltage scaling, power saving like self refresh, prefetching, data bus convergence, and crc-based error detection.
The quiz section presents multiple choice questions on design cost and ease, compactness, data transfer bandwidth, cache memory choices, and ddr4 prefix multipliers, with correct answers demonstrated.
In section two, this lecture covers pediatrics interviews, signal groups and interactions, interface layouts, genetic aspects for diabetics and pediatrics, a datasheet walkthrough, and an assignment.
Explore lpddr interface concepts, compare lpddr variants, evaluate voltage scaling, self refresh, bandwidth, and signal groups, analyze single versus differential signals, and outline a general component selection procedure.
Explore signal groups for a DDR interface, including data, data mask, command, and control signals, across single-ended and differential lanes, with LPDDR channels and PCB layout considerations.
Explore direct and flyby LPDDR4 topologies with integrated controllers inside packages, detailing bite groups, two-channel interconnections, and bandwidth calculations linking clock, data width, and channels.
Analyze the RK3399 datasheet features, including memory interfaces from DDR to LPDDR, NAND/NOR flash, EMC boot ROM, SD card options, and the Cortex-A53/A72 with Mali GPU.
Learn how to select two 2GB LPDDR4 memory modules for a mobile design, evaluating capacity, channels, voltage, bandwidth, latency, processor compatibility, cost, and vendor options.
Explore section 3 introduction and attachment details within the advanced hardware and pcb design masterclass 2022 by EsteemPCB, focusing on key concepts and practical setup.
Learn to read LPDDR4 SDRAM datasheets and translate them into hardware design, focusing on memory organization, channel pairing, termination, timing, power sequencing, and schematic footprint creation.
Discover a centralized sob board library of 600–700 components in Altium, with filters for capacitors, connectors, and pins; learn naming conventions, symbol and footprint creation, and interface planning.
Learn LPDDR4 schematic design by applying datasheet guidelines, creating project blocks, wiring channel a and b with proper net labels, and implementing recommended bypass and bulk capacitors.
Create a COB board block diagram exposing type-c, DC power, display options (ADP, DSI, SDMI), SD card, PCIe and mini-PCIe, two cameras, 40-pin header, and PMIC considerations.
Evaluate the correct bmtc selection and compare market chips. Review online system requirements, the PMC data sheet, and design s.o.b power distribution blocks while analyzing current flow and voltage drops.
Learn how to select a PMIC for a processor board, compare reference designs and custom schematics, and evaluate sequencing, power blocks, and features using a column-based analysis.
Learn RK3399 system requirements, PMIC datasheet, and design guidelines, focusing on power sequencing and system power design across CPU, DDR, and PMU rails.
Explore power distribution blocks for COB by reading datasheet sequencing tables and configuring the pmrc to set boot-order voltages. Learn to simplify regulator networks and follow design guidelines for sequencing.
Explore the PMI schematic design, followed by the embassy's selection and its parameter list, then examine the EMC datasheet as a schematic design, and verify modules and their selection parameters.
This lecture covers PMIC schematic design, wireless module integration, and hands-on PMIC power-rail design with a 3.3 V input, inductors, capacitors, I2C control, pull-ups, and reset/power keys.
Learn PMIC schematic design by wiring power rails and switches, selecting capacitors and inductors per datasheet, and isolating analog and digital blocks across 3.3v and 1.8v domains.
Learn how to select eMMC memory for embedded systems, analyzing JEDEC eMMC 5.1 compatibility, flash memory and controller roles, NAND types (SLC/MLC/TLC), and essential electrical and interface specs.
Design and schematic capture for an MSI board with eMMC memory, selecting the 16gb variant and wiring essential interface pins, power rails, pull-ups, and bypass capacitors per datasheet.
Select wifi modules by evaluating twelve parameters, including standards and certification, frequency band, range, voltage, throughput, embedded MCU, driver support, interface and connector, antennas, security, and packaging.
Explore section six details: five modules, their parameters, and certifications in depth. Preview blocks of AKA double nine, page requirements, and the requirements and architecture of article nine.
Explore wifi module selection and datasheet analysis, comparing WF60 and AP6356S, covering protocols, bands, data rates, security, interfaces, antennas, and certifications.
Map RK3399 pins from the datasheet and design guidelines, build schematic blocks, and assemble power, emc, and interface sections (type-c, ddr, pci) for a complete board design.
Explore the schematic design of the power block for a marketable light, then cover IMSI system blocks, DMC, ADC, CSI DC, and Type-C and GPI schematics to align all blocks.
Design the RK3399 power blocks schematic by following reference design guidelines, selecting bulk and bypass capacitors, and routing power nets for CPU and GPU rails.
Inspect the emmc system blocks schematic design, detailing pin connections, clocking options, gpo usage, power rails, pull-downs, and fuses to ensure reliable sd card and emmc operation.
Explore sdmmc, adc, pcie, mipi-dsi, edp, and hdmi schematic blocks for rk3399, covering power rails, bypass capacitors, references, differential pairs, and interface planning.
Design type-c, mipi-csi, gpios, i2cs, and uarts schematic blocks for rk3399, using a channel configuration controller, typekit references, and pull-ups, pull-downs, and clocks.
Explore the interfaces used on this board, including I2C, SBI interface, ElBaradei's i20 as Dio, and different MIA interfaces. Complete and submit the included assignment.
Explore i2c and spi interfaces, comparing two-wire i2c with data and clock lines, pull-ups, and load capacitance, to spi's separate data lines, chip select, and higher transfer rates.
Explore LVDS interfaces and their low-voltage differential signaling, compare with RS-232 DB9 connections, and discuss differential drivers and receivers, cable length, termination, and multi-drop bus configurations.
Explore i2s and sdio interfaces, covering data, word select, and serial clock signals, left-right channel switching, and master/slave and host-device configurations.
analyze media independent interfaces, compare rmii, gmii, and sdmi options, and explore an rmii design with integrated magnetics and RJ-45 isolation for the assignment.
Explore section nine of the first board design, focusing on pending interfaces from section eight - USB, IDSA, EDB, and HDMI - and learn to finish the pending schematic blocks.
Explore pending interfaces in advanced hardware design, including USB variants (2.0, 3.1, Type-C), CSI/DSI camera interfaces, EDP and HDMI displays, and PCI Express, with connector and design considerations.
Explore RK3399 schematic blocks, including HDMI, USB Type-C, USB host, DSI/CSI, and PCI connectors. Learn to interpret design guidelines, clocks, pull-ups, and regulators for schematic design.
Implement definitions and rules for the latest ups in our design, then compare four-layer and six-layer stack-ups and cover placement planning for the first board.
Explore how to define and select layer stack-ups for multi-layer PCBs, comparing four- and six-layer configurations, plane types, and interlayer spacing for impedance control.
Explore and compare 4-, 6-, 8-, and 12-layer pcb stack-ups, focusing on ground and power plane coupling, return paths, and fringe fields to guide choosing a robust high-speed design.
Master placement planning for complex development boards by organizing components into functional blocks, edge placing for connectors, and performing block routing and iterative layout refinement.
I have Divided this Course into #13 Different Sections Under Each Section You will find Multiple Lessons:
Section 1: Discuss the Requirement sheet and Processor RK3399 Datasheet in very detail.
Section 2: How to Choose an SDRAM (SDR/DDRX/LPDDRX) ? from Very Scratch and Its Pin Mapping and Schematic Design From Datasheet.
Section 3: Selection and Schematic Design of PMIC (Power Management IC) in very Details.
Section 4: EMMC (Embedded Multimedia Card) Chip Selection, Pin Mapping, and Schematic Design.
Section 5: WIFI/BT Module Selection, Certification (US/EU/CA), Selection, and Schematic Design.
Section 6: Selection of External LDO/DC-DC/Buck-Boost and Their Schematic Design in very Details.
Section 7: Schematic Design of RK3399, Pin Mapping and Impedances Planning on Schematic through Net-Classes.
Section 8: Layer Stack up(4/6/8/12L), Finish the Components Placement Planning and its Execution Part-1
Section 9: Components Placement Planning and its Execution Part-2
Section 10: Components Placement Planning and its Execution Part-3
Section 11: Layout Planning, Preliminary Layout, High-Speed Design Rules and Length Matching, Power Plane Planning by Sections, Optimization of Layout Part-1
Section 12, 13: Power Plane Planning by Sections, Optimization of Layout.
Major Schematic Blocks that I have designed in this course are Project Block Diagram, "Power Budget Block Diagram", "Power Supply Schematic for RK3399", "PMUIO Schematic Block of RK3399", "EMMC/PCIe/ADC Schematic for RK3399", "EDP/MIPI-DSI/HDMI Schematic for RK3399", "Type-C/USB3.0/USB2.0 Hosts Schematic for RK3399", "MIPI-CSI/GPIOs/I2C Schematic of RK3399", "MII/RMII/GMII/RGMII Schematic for RK3399", "SDR/DDRx/LPDDRx Schematic For RK3399", "PMIC/DC-DC/LDOs/Buck-Boost for RK3399" and many more various subparts you will learn in this course as you can see on the curriculum sections and their lessons.
You will also learn some basic hardware designing blocks as well as You will also learn some Basic Blocks as well:
Pre-Schematic Design Blocks (Block Diagram and Power Budget)
Layer Stack-up Selection and Rules for Defining any Stack-up
Different Grounding Techniques( Signal Grounding, Earth Grounding, Chassis Grounding)
Power Distribution Network Analysis (PDN Analysis) of any PCB.
and many more things.
Ferrite Bead, ESD Diodes, and Magnetic Application and their selection.
How to do Placement and Layout Planning on Microsoft-Paint and many more.
After the completion of this course, you can design any "Processor Board" without any Simulation models and third-party support.