Advanced Computer Architecture & Organization: HD Course

In this lecture, you will learn ISA and

Classification of instructions as:

1. 4-address instruction

2. 3-address instruction

3. 2-address instruction

4. 1-address instruction

5. 0-address instruction

In this lecture, you will learn:

1. address instruction

2. address instruction

3. In direct addressing mode

4. Register(direct) addressing mode

5. Register indirect addressing mode:

6. Displacement addressing mode

7. Relative addressing mode

In this lecture, you will learn,

Classification of machines:

1. Relative addressing mode

2. Register-memory machines

3. Memory-memory machines

   
   

In this lecture, you will learn a short introduction of CISC and RISC architectures.

In this lecture, you will learn introduction to memory hierachies like:

• registers

• cache memory

• main memory

• and removable media etc

In this lecture, you will learn complete detail of main memory: RAM and ROM

In this lecture, you will learn

• cache memory

• operations on cache memory

• cache hit

• cache miss

• cache mapping

In this lecture, you will learn complete memory management introduction.

you will learn general introduction of CPU in this lecture.

In this lecture, you will learn register organization like

• The general purpose registers:

• Memory address register (MAR):

• Memory buffer register (MBR)

• Program counter (PC):

• Instruction register (IR):

You will be able to learn general execution of a program of in this lecture.

In this lecture you will learn uni bus implementation of processor and

• Fetching a Word from Memory

• Storing a word into memory

• Register Transfer Operation

• Performing the arithmetic or logic operation

In this lecture, you will learn a multiple bus implementation of processor

In this lecture, you will be able to learn complete execution of an instruction inside CPU.

In this lecture, you will get general introduction of control signals which are used by procesdor for controlling different functionality.

In this lecture, students will learn memory buffer register MBR circuitry.

In this lecture, students will learn memory buffer register MBR Circuitry.

In this lecture, students will learn registers internal connections with different parts inside CPU.

In this lecture, you will learn control signals for instruction fetch operation.

In this lecture, you will learn control signals for add operation.

In this lecture, students will be able to understand the two architecture

• RISC

• CISC

In this lecture, students will learn some main characteristics of RISC architecture like,

• One instruction per machine cycle.

• Simple addressing mode.

• Simple instructions format and much more.

In this lecture, students will learn some design issues related to RISC architecture like,

• Use of large register file.

• Use of compiler virtual registers instead of using large register file.

• Large register file versus cache memory.

In this lecture, students will get the general idea of  control unit.

In this lecture, you will learn the hardwired implementation of control unit. As i discussed in my previous lecture that there are two kinds of control unit implementation; the hardwired implementation and microprogramming implementation.

In this lecture, I will go through the basic introduction of pipelining.

In this lecture, students will be able to learn some complications (problems) related to pipeline Architecture of processor.

In this lecture, students will learn the basics requirements for designing a pipeline processor.

In this article you will learn some common hazards in pipeling

This lecture is the general introduction to input/output subsystems.

In this lecture you will be able to learn about the two address spaces... Memory mapped input output space vs isolated input output space.

In this lecture, you will learn about which things are necessary during design of input output subsystems.

There are basically three input output techniques.